| /arch/mips/oprofile/ |
| D | op_model_mipsxx.c | 87 static inline unsigned int counters_total_to_per_cpu(unsigned int counters) in counters_total_to_per_cpu() argument
89 return counters >> vpe_shift(); in counters_total_to_per_cpu()
92 static inline unsigned int counters_per_cpu_to_total(unsigned int counters) in counters_per_cpu_to_total() argument
94 return counters << vpe_shift(); in counters_per_cpu_to_total()
152 unsigned int counters = op_model_mipsxx_ops.num_counters; in mipsxx_reg_setup() local
156 for (i = 0; i < counters; i++) { in mipsxx_reg_setup()
181 unsigned int counters = op_model_mipsxx_ops.num_counters; in mipsxx_cpu_setup() local
186 switch (counters) { in mipsxx_cpu_setup()
205 unsigned int counters = op_model_mipsxx_ops.num_counters; in mipsxx_cpu_start() local
210 switch (counters) { in mipsxx_cpu_start()
[all …]
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| /arch/x86/oprofile/ |
| D | nmi_int.c | 77 struct op_msr *counters = msrs->counters; in nmi_cpu_save_registers() local
82 if (counters[i].addr) in nmi_cpu_save_registers()
83 rdmsrl(counters[i].addr, counters[i].saved); in nmi_cpu_save_registers()
202 struct op_msr *counters = msrs->counters; in nmi_cpu_save_mpx_registers() local
208 if (counters[i].addr) in nmi_cpu_save_mpx_registers()
209 rdmsrl(counters[i].addr, multiplex[virt].saved); in nmi_cpu_save_mpx_registers()
215 struct op_msr *counters = msrs->counters; in nmi_cpu_restore_mpx_registers() local
221 if (counters[i].addr) in nmi_cpu_restore_mpx_registers()
222 wrmsrl(counters[i].addr, multiplex[virt].saved); in nmi_cpu_restore_mpx_registers()
307 kfree(per_cpu(cpu_msrs, i).counters); in free_msrs()
[all …]
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| D | op_model_ppro.c | 38 if (!msrs->counters[i].addr) in ppro_shutdown()
57 msrs->counters[i].addr = MSR_P6_PERFCTR0 + i; in ppro_fill_in_addresses()
108 wrmsrl(msrs->counters[i].addr, -1LL); in ppro_setup_ctrs()
113 if (counter_config[i].enabled && msrs->counters[i].addr) { in ppro_setup_ctrs()
115 wrmsrl(msrs->counters[i].addr, -reset_value[i]); in ppro_setup_ctrs()
136 rdmsrl(msrs->counters[i].addr, val); in ppro_check_ctrs()
140 wrmsrl(msrs->counters[i].addr, -reset_value[i]); in ppro_check_ctrs()
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| D | op_model_amd.c | 295 if (!msrs->counters[i].addr) in op_amd_shutdown()
315 msrs->counters[i].addr = MSR_F15H_PERF_CTR + (i << 1); in op_amd_fill_in_addresses()
319 msrs->counters[i].addr = MSR_K7_PERFCTR0 + i; in op_amd_fill_in_addresses()
342 && msrs->counters[op_x86_virt_to_phys(i)].addr) in op_amd_setup_ctrs()
361 wrmsrl(msrs->counters[i].addr, -1LL); in op_amd_setup_ctrs()
371 wrmsrl(msrs->counters[i].addr, -(u64)reset_value[virt]); in op_amd_setup_ctrs()
391 rdmsrl(msrs->counters[i].addr, val); in op_amd_check_ctrs()
396 wrmsrl(msrs->counters[i].addr, -(u64)reset_value[virt]); in op_amd_check_ctrs()
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| D | op_x86_model.h | 24 struct op_msr *counters; member
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| D | op_model_p4.c | 393 if (msrs->counters[i].addr) in p4_shutdown()
394 release_perfctr_nmi(msrs->counters[i].addr); in p4_shutdown()
420 msrs->counters[i].addr = addr; in p4_fill_in_addresses()
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| /arch/mips/include/asm/ |
| D | spinlock.h | 40 u32 counters = ACCESS_ONCE(lock->lock); in arch_spin_is_locked() local
42 return ((counters >> 16) ^ counters) & 0xffff; in arch_spin_is_locked()
56 u32 counters = ACCESS_ONCE(lock->lock); in arch_spin_is_contended() local
58 return (((counters >> 16) - counters) & 0xffff) > 1; in arch_spin_is_contended()
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| /arch/mips/kernel/ |
| D | perf_event_mipsxx.c | 168 static unsigned int counters_total_to_per_cpu(unsigned int counters) in counters_total_to_per_cpu() argument
170 return counters >> vpe_shift(); in counters_total_to_per_cpu()
771 int counters; in n_counters() local
775 counters = 2; in n_counters()
781 counters = 4; in n_counters()
785 counters = __n_counters(); in n_counters()
788 return counters; in n_counters()
793 int counters = (int)(long)arg; in reset_counters() local
794 switch (counters) { in reset_counters()
1421 unsigned int counters = mipspmu.num_counters; in mipsxx_pmu_handle_shared_irq() local
[all …]
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| /arch/x86/kvm/ |
| D | pmu_amd.c | 84 struct kvm_pmc *counters; in amd_msr_idx_to_pmc() local
89 counters = pmu->gp_counters; in amd_msr_idx_to_pmc()
91 return &counters[idx]; in amd_msr_idx_to_pmc()
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| D | pmu_intel.c | 137 struct kvm_pmc *counters; in intel_msr_idx_to_pmc() local
142 counters = pmu->fixed_counters; in intel_msr_idx_to_pmc()
145 counters = pmu->gp_counters; in intel_msr_idx_to_pmc()
150 return &counters[array_index_nospec(idx, num_counters)]; in intel_msr_idx_to_pmc()
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| /arch/mips/kvm/ |
| D | Kconfig | 38 bool "Maintain counters for COP0 accesses"
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| /arch/powerpc/platforms/pseries/ |
| D | Kconfig | 124 Enable access to hypervisor supplied counters in perf. Currently,
126 interfaces to retrieve counters. GPCI exists on Power 6 and later
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| /arch/s390/kvm/ |
| D | interrupt.c | 645 fi->counters[FIRQ_CNTR_PFAULT] -= 1; in __deliver_pfault_done()
695 fi->counters[FIRQ_CNTR_VIRTIO] -= 1; in __deliver_virtio()
746 fi->counters[FIRQ_CNTR_IO] -= 1; in __deliver_io()
1195 fi->counters[FIRQ_CNTR_IO] -= 1; in get_io_int()
1256 if (fi->counters[FIRQ_CNTR_VIRTIO] >= KVM_S390_MAX_VIRTIO_IRQS) { in __inject_virtio()
1260 fi->counters[FIRQ_CNTR_VIRTIO] += 1; in __inject_virtio()
1273 if (fi->counters[FIRQ_CNTR_PFAULT] >= in __inject_pfault_done()
1278 fi->counters[FIRQ_CNTR_PFAULT] += 1; in __inject_pfault_done()
1308 if (fi->counters[FIRQ_CNTR_IO] >= KVM_S390_MAX_FLOAT_IRQS) { in __inject_io()
1312 fi->counters[FIRQ_CNTR_IO] += 1; in __inject_io()
[all …]
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| /arch/x86/include/asm/xen/ |
| D | interface.h | 260 uint32_t counters; member
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| /arch/x86/xen/ |
| D | pmu.c | 267 counter_regs = field_offset(ctxt, counters); in xen_amd_pmu_emulate()
345 counter_regs = field_offset(ctxt, counters); in xen_amd_read_pmc()
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| /arch/powerpc/boot/dts/ |
| D | a4m072.dts | 39 fsl,init-fd-counters = <0x3333>;
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| /arch/mips/include/asm/mach-cavium-octeon/ |
| D | kernel-entry-init.h | 41 # counters interrupt to IRQ 6
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| /arch/s390/include/asm/ |
| D | kvm_host.h | 459 int counters[FIRQ_MAX_COUNT]; member
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| /arch/m68k/fpsp040/ |
| D | skeleton.S | 48 | The following counters are used for standalone testing
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| /arch/ |
| D | Kconfig | 26 The number of hardware counters is limited. The multiplexing
27 feature enables OProfile to gather more events than counters
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| /arch/parisc/kernel/ |
| D | perf_asm.S | 41 ; Enable the performance counters
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| /arch/arc/ |
| D | Kconfig | 524 The counters can be cleared via Debugfs as well
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| /arch/x86/ |
| D | Kconfig | 947 performance counters), and the NMI watchdog which detects hard
|