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Searched refs:cpuctrl0 (Results 1 – 4 of 4) sorted by relevance

/arch/mips/sgi-ip22/
Dip22-mc.c125 tmp = sgimc->cpuctrl0; in sgimc_init()
127 sgimc->cpuctrl0 = tmp; in sgimc_init()
140 tmp = sgimc->cpuctrl0; in sgimc_init()
145 sgimc->cpuctrl0 = tmp; in sgimc_init()
Dip22-reset.c74 sgimc->cpuctrl0 |= SGIMC_CCTRL0_SYSINIT; in sgi_machine_restart()
115 sgimc->cpuctrl0 |= SGIMC_CCTRL0_SYSINIT; in debounce()
Dip28-berr.c290 sgimc->cpuctrl0, sgimc->cpuctrl0, sgimc->giopar, in print_buserr()
/arch/mips/include/asm/sgi/
Dmc.h18 volatile u32 cpuctrl0; /* CPU control register 0, readwrite */ member