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Searched refs:dir0 (Results 1 – 7 of 7) sorted by relevance

/arch/x86/kernel/cpu/
Dcyrix.c18 static void __do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) in __do_cyrix_devid() argument
33 *dir0 = 0xfd; in __do_cyrix_devid()
36 *dir0 = 0xfe; in __do_cyrix_devid()
42 *dir0 = getCx86(CX86_DIR0); in __do_cyrix_devid()
47 static void do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) in do_cyrix_devid() argument
52 __do_cyrix_devid(dir0, dir1); in do_cyrix_devid()
171 unsigned char dir0, dir0_msn, dir1 = 0; in early_init_cyrix() local
173 __do_cyrix_devid(&dir0, &dir1); in early_init_cyrix()
174 dir0_msn = dir0 >> 4; /* identifies CPU "family" */ in early_init_cyrix()
190 unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0; in init_cyrix() local
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/arch/cris/arch-v10/drivers/
Di2c.c647 port_pb_dir_shadow &= ~IO_MASK(R_PORT_PB_DIR, dir0); in i2c_init()
651 IO_STATE(R_PORT_PB_DIR, dir0, input) | in i2c_init()
/arch/alpha/include/asm/
Dcore_tsunami.h44 tsunami_64 dir0; member
Dcore_titan.h45 titan_64 dir0; member
/arch/alpha/kernel/
Dcore_tsunami.c398 printk("%s: CSR_DIR0 0x%lx\n", __func__, TSUNAMI_cchip->dir0.csr); in tsunami_init_arch()
Dsys_dp264.c197 pld = TSUNAMI_cchip->dir0.csr; in dp264_device_interrupt()
Dcore_titan.c375 printk("%s: CSR_DIR0 0x%lx\n", __func__, TITAN_cchip->dir0.csr); in titan_init_arch()