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/arch/x86/purgatory/
Dsha256.c50 u32 a, b, c, d, e, f, g, h, t1, t2; in sha256_transform() local
64 e = state[4]; f = state[5]; g = state[6]; h = state[7]; in sha256_transform()
67 t1 = h + e1(e) + Ch(e, f, g) + 0x428a2f98 + W[0]; in sha256_transform()
69 t1 = g + e1(d) + Ch(d, e, f) + 0x71374491 + W[1]; in sha256_transform()
70 t2 = e0(h) + Maj(h, a, b); c += t1; g = t1 + t2; in sha256_transform()
72 t2 = e0(g) + Maj(g, h, a); b += t1; f = t1 + t2; in sha256_transform()
74 t2 = e0(f) + Maj(f, g, h); a += t1; e = t1 + t2; in sha256_transform()
76 t2 = e0(e) + Maj(e, f, g); h += t1; d = t1 + t2; in sha256_transform()
78 t2 = e0(d) + Maj(d, e, f); g += t1; c = t1 + t2; in sha256_transform()
79 t1 = b + e1(g) + Ch(g, h, a) + 0x923f82a4 + W[6]; in sha256_transform()
[all …]
/arch/x86/include/asm/
Ddesc_defs.h32 unsigned limit: 4, avl: 1, l: 1, d: 1, g: 1, base2: 8; member
75 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8; member
84 #define gate_offset(g) ((g).offset_low | ((unsigned long)(g).offset_middle << 16) | ((unsigned long… argument
85 #define gate_segment(g) ((g).segment) argument
90 #define gate_offset(g) (((g).b & 0xffff0000) | ((g).a & 0x0000ffff)) argument
91 #define gate_segment(g) ((g).a >> 16) argument
Datomic64_32.h25 #define __alternative_atomic64(f, g, out, in...) \ argument
27 : out : [func] "i" (atomic64_##g##_cx8), ## in)
31 #define __alternative_atomic64(f, g, out, in...) \ argument
32 alternative_call(atomic64_##f##_386, atomic64_##g##_cx8, \
/arch/alpha/kernel/
Dmodule.c47 struct got_entry *g; in process_reloc_for_got() local
52 for (g = chains + r_sym; g ; g = g->next) in process_reloc_for_got()
53 if (g->r_addend == r_addend) { in process_reloc_for_got()
54 if (g->got_offset == 0) { in process_reloc_for_got()
55 g->got_offset = *poffset; in process_reloc_for_got()
61 g = kmalloc (sizeof (*g), GFP_KERNEL); in process_reloc_for_got()
62 g->next = chains[r_sym].next; in process_reloc_for_got()
63 g->r_addend = r_addend; in process_reloc_for_got()
64 g->got_offset = *poffset; in process_reloc_for_got()
66 chains[r_sym].next = g; in process_reloc_for_got()
[all …]
/arch/ia64/include/asm/sn/
Dgeo.h112 static inline slabid_t geo_slab(geoid_t g) in geo_slab() argument
114 return (g.common.type == GEO_TYPE_INVALID) ? in geo_slab()
115 INVALID_SLAB : g.common.slab; in geo_slab()
118 static inline slotid_t geo_slot(geoid_t g) in geo_slot() argument
120 return (g.common.type == GEO_TYPE_INVALID) ? in geo_slot()
121 INVALID_SLOT : g.common.slot; in geo_slot()
124 static inline moduleid_t geo_module(geoid_t g) in geo_module() argument
126 return (g.common.type == GEO_TYPE_INVALID) ? in geo_module()
127 INVALID_MODULE : g.common.module; in geo_module()
/arch/tile/lib/
Dstrchr_32.c21 int z, g; in strchr() local
56 g = __insn_ctz(goal_matches); in strchr()
62 return (g <= z) ? ((char *)p) + (g >> 3) : NULL; in strchr()
Dstrchr_64.c22 int z, g; in strchr() local
54 g = CFZ(goal_matches); in strchr()
60 return (g <= z) ? ((char *)p) + (g >> 3) : NULL; in strchr()
/arch/powerpc/crypto/
Dsha256-spe-asm.S106 #define R_LOAD_W(a, b, c, d, e, f, g, h, w, off) \ argument
114 andc rT1,g,e; /* 1: ch' = ~e and g */ \
144 add g,g,rT0; /* 2: temp1 = h + S1 */ \
147 add g,g,rT3; /* 2: temp1 = temp1 + temp1' */ \
149 add g,g,rT2; /* 2: temp1 = temp1 + K */ \
156 add c,c,g; /* 2: d = d + temp1 */ \
159 add g,g,rT3 /* 2: h = temp1 + temp2 */
161 #define R_CALC_W(a, b, c, d, e, f, g, h, w0, w1, w4, w5, w7, k, off) \ argument
176 andc rT3,g,e; /* 1: ch' = ~e and g */ \
202 add g,g,rT1; /* 2: temp1 = temp1 + wk */ \
[all …]
/arch/x86/crypto/
Dsha256-avx2-asm.S108 g = %r10d define
148 h = g
149 g = f define
172 xor g, y2 # y2 = f^g # CH
176 and e, y2 # y2 = (f^g)&e # CH
186 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
221 xor g, y2 # y2 = f^g # CH
227 and e, y2 # y2 = (f^g)&e # CH
236 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
270 xor g, y2 # y2 = f^g # CH
[all …]
Dsha256-avx-asm.S111 g = %r10d define
144 h = g
145 g = f define
167 xor g, y2 # y2 = f^g
170 and e, y2 # y2 = (f^g)&e
176 xor g, y2 # y2 = CH = ((f^g)&e)^g
203 xor g, y2 # y2 = f^g
207 and e, y2 # y2 = (f^g)&e
211 xor g, y2 # y2 = CH = ((f^g)&e)^g
241 xor g, y2 # y2 = f^g
[all …]
Dsha256-ssse3-asm.S103 g = %r10d define
137 h = g
138 g = f define
161 xor g, y2 # y2 = f^g
164 and e, y2 # y2 = (f^g)&e
170 xor g, y2 # y2 = CH = ((f^g)&e)^g
202 xor g, y2 # y2 = f^g
206 and e, y2 # y2 = (f^g)&e
210 xor g, y2 # y2 = CH = ((f^g)&e)^g
243 xor g, y2 # y2 = f^g
[all …]
Dsha512-avx2-asm.S90 g = %r10 define
149 h = g
150 g = f define
194 xor g, y2 # y2 = f^g # CH
197 and e, y2 # y2 = (f^g)&e # CH
206 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
257 xor g, y2 # y2 = f^g # CH
263 and e, y2 # y2 = (f^g)&e # CH
270 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
312 xor g, y2 # y2 = f^g # CH
[all …]
/arch/s390/kvm/
Dtrace.h284 TP_PROTO(VCPU_PROTO_COMMON, int g, int reg1, int reg3, u64 addr),
285 TP_ARGS(VCPU_ARGS_COMMON, g, reg1, reg3, addr),
289 __field(int, g)
297 __entry->g = g;
304 __entry->g ? "lctlg" : "lctl",
309 TP_PROTO(VCPU_PROTO_COMMON, int g, int reg1, int reg3, u64 addr),
310 TP_ARGS(VCPU_ARGS_COMMON, g, reg1, reg3, addr),
314 __field(int, g)
322 __entry->g = g;
329 __entry->g ? "stctg" : "stctl",
/arch/metag/mm/
Dmmu-meta2.c84 unsigned int g; in repriv_mmu_tables() local
93 for (g = 0; g < 2; ++g) { in repriv_mmu_tables()
102 g ? "global" : "local"); in repriv_mmu_tables()
/arch/arm/boot/dts/
Dkirkwood-guruplug-server-plus.dts26 pmx_led_health_g: pmx-led-health-g {
34 pmx_led_wmode_g: pmx-led-wmode-g {
65 health-g {
73 wmode-g {
Dkirkwood-dir665.dts61 pmx_led_5g: pmx-led-5g {
77 pmx_led_24g: pmx-led-24g {
168 label = "dir665:blue:5g";
183 blue-24g {
184 label = "dir665:blue:24g";
/arch/powerpc/platforms/pseries/
Dpower.c59 static struct attribute *g[] = { variable
65 .attrs = g,
/arch/m68k/fpsp040/
Dround.S33 | d0{31:29} contains the g,r,s bits (extended)
36 | a0 is preserved and the g-r-s bits in d0 are cleared.
41 | inexact (i.e. if any of the g-r-s bits were set).
46 | If g=r=s=0 then result is exact and round is done, else set
51 | ;the appropriate g-r-s bits.
84 movel #0xffffffff,%d0 |force g,r,s to be all f's
112 | If (g=1), then add 1 to l and if (r=s=0), then clear l
117 asll #1,%d0 |shift g-bit to c-bit
118 bcc truncate |if (g=1) then
148 bfextu LOCAL_HI(%a0){#24:#2},%d3 |sgl prec. g-r are 2 bits right
[all …]
/arch/powerpc/boot/dts/fsl/
Dp5040si-post.dtsi427 /include/ "qoriq-fman-0-1g-0.dtsi"
428 /include/ "qoriq-fman-0-1g-1.dtsi"
429 /include/ "qoriq-fman-0-1g-2.dtsi"
430 /include/ "qoriq-fman-0-1g-3.dtsi"
431 /include/ "qoriq-fman-0-1g-4.dtsi"
432 /include/ "qoriq-fman-0-10g-0.dtsi"
454 /include/ "qoriq-fman-1-1g-0.dtsi"
455 /include/ "qoriq-fman-1-1g-1.dtsi"
456 /include/ "qoriq-fman-1-1g-2.dtsi"
457 /include/ "qoriq-fman-1-1g-3.dtsi"
[all …]
Dqoriq-fman3-0-10g-1-best-effort.dtsi2 * QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x400000 ]
40 fsl,fman-10g-port;
48 fsl,fman-10g-port;
Dqoriq-fman3-0-10g-0.dtsi2 * QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x400000 ]
40 fsl,fman-10g-port;
47 fsl,fman-10g-port;
Dqoriq-fman3-1-10g-1.dtsi2 * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x500000 ]
40 fsl,fman-10g-port;
47 fsl,fman-10g-port;
Dqoriq-fman3-1-10g-0.dtsi2 * QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x500000 ]
40 fsl,fman-10g-port;
47 fsl,fman-10g-port;
Dqoriq-fman3-0-10g-1.dtsi2 * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
40 fsl,fman-10g-port;
47 fsl,fman-10g-port;
/arch/x86/kernel/
Dtboot.c266 #define TB_COPY_GAS(tbg, g) \ in tboot_copy_fadt() argument
267 tbg.space_id = g.space_id; \ in tboot_copy_fadt()
268 tbg.bit_width = g.bit_width; \ in tboot_copy_fadt()
269 tbg.bit_offset = g.bit_offset; \ in tboot_copy_fadt()
270 tbg.access_width = g.access_width; \ in tboot_copy_fadt()
271 tbg.address = g.address; in tboot_copy_fadt()

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