| /arch/sparc/lib/ |
| D | VISsave.S | 26 ldub [%g6 + TI_FPDEPTH], %g1
29 stb %g0, [%g6 + TI_FPSAVED]
30 stx %fsr, [%g6 + TI_XFSR]
36 vis1: ldub [%g6 + TI_FPSAVED], %g3
37 stx %fsr, [%g6 + TI_XFSR]
39 stb %g3, [%g6 + TI_FPSAVED]
44 stx %g3, [%g6 + TI_GSR]
45 2: add %g6, %g1, %g3
50 add %g6, %g1, %g3
53 add %g6, %g1, %g2
[all …]
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| D | clear_page.S | 39 lduw [%g6 + TI_PRE_COUNT], %o2
59 stw %o4, [%g6 + TI_PRE_COUNT]
99 stw %o2, [%g6 + TI_PRE_COUNT]
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| D | copy_page.S | 48 lduw [%g6 + TI_PRE_COUNT], %o4
74 stw %o2, [%g6 + TI_PRE_COUNT]
169 ldub [%g6 + TI_FAULT_CODE], %g3
237 stw %o4, [%g6 + TI_PRE_COUNT]
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| /arch/sparc/kernel/ |
| D | dtlb_miss.S | 3 ldxa [%g0] ASI_DMMU, %g6 ! Get TAG TARGET
4 srlx %g6, 48, %g5 ! Get context
5 sllx %g6, 22, %g6 ! Zero out context
7 srlx %g6, 22, %g6 ! Delay slot
9 cmp %g4, %g6 ! Compare TAG
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| D | itlb_miss.S | 3 ldxa [%g0] ASI_IMMU, %g6 ! Get TAG TARGET
4 srlx %g6, 48, %g5 ! Get context
5 sllx %g6, 22, %g6 ! Zero out context
7 srlx %g6, 22, %g6 ! Delay slot
9 cmp %g4, %g6 ! Compare TAG
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| D | rtrap_64.S | 132 ldx [%g6 + TI_FLAGS], %l0
143 ldub [%g6 + TI_WSAVED], %o2
152 stb %g0, [%g6 + TI_FPDEPTH]
162 mov %g6, %l2
165 LOAD_PER_CPU_BASE(%g5, %g6, %i0, %i1, %i2)
167 ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
179 mov %l2, %g6
232 ldx [%g6 + TI_FLAGS], %g3
274 ldsw [%g6 + TI_PRE_COUNT], %l5
276 ldx [%g6 + TI_FLAGS], %l5
[all …]
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| D | winfixup.S | 24 TRAP_LOAD_THREAD_REG(%g6, %g1)
28 stb %g4, [%g6 + TI_FAULT_CODE]
29 stx %g5, [%g6 + TI_FAULT_ADDR]
43 TRAP_LOAD_THREAD_REG(%g6, %g1)
44 ldx [%g6 + TI_FLAGS], %g1
48 ldub [%g6 + TI_WSAVED], %g1
50 add %g6, %g3, %g3
54 add %g6, %g3, %g3
89 stb %g1, [%g6 + TI_WSAVED]
97 stb %g4, [%g6 + TI_FAULT_CODE]
[all …]
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| D | urtt_fill.S | 40 stb %g4, [%g6 + TI_FAULT_CODE]
41 stx %g5, [%g6 + TI_FAULT_ADDR]
43 mov %g6, %l1
54 mov %l1, %g6
55 ldx [%g6 + TI_TASK], %g4
56 LOAD_PER_CPU_BASE(%g5, %g6, %g1, %g2, %g3)
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| D | wof.S | 39 #define curptr g6 /* Gets set to 'current' then stays G */
76 mov %g6, %saved_g6 ! save away 'current' ptr register
120 mov %saved_g6, %g6 ! restore %curptr
188 mov %saved_g6, %g6
244 mov %saved_g6, %g6
247 sethi %hi(STACK_OFFSET), %g6
248 or %g6, %lo(STACK_OFFSET), %g6
249 sub %sp, %g6, %g6 ! curptr
283 mov %saved_g6, %g6
|
| D | ktlb.S | 38 KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_itlb_load)
54 TSB_WRITE(%g1, %g5, %g6)
102 TSB_WRITE(%g1, %g5, %g6)
112 TSB_WRITE(%g1, %g5, %g6)
126 TSB_WRITE(%g1, %g5, %g6)
150 KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_dtlb_load)
153 KERN_TSB4M_LOOKUP_TL1(%g6, %g5, %g1, %g2, %g3, kvmap_dtlb_load)
166 TSB_WRITE(%g1, %g5, %g6)
217 KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_dtlb_load)
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| D | fpu_traps.S | 22 1: TRAP_LOAD_THREAD_REG(%g6, %g1)
23 ldub [%g6 + TI_FPSAVED], %g5
28 ldx [%g6 + TI_GSR], %g7
66 add %g6, TI_FPREGS + 0x80, %g1
86 add %g6, TI_FPREGS + 0xc0, %g2
117 add %g6, TI_FPREGS, %g1
128 add %g6, TI_FPREGS + 0x40, %g2
150 add %g6, TI_FPREGS, %g1
187 ldx [%g6 + TI_XFSR], %fsr
207 TRAP_LOAD_THREAD_REG(%g6, %g1)
[all …]
|
| D | tsb.S | 77 mov %g6, %g2
78 and %g5, 0x7, %g6
81 sllx %g7, %g6, %g7
82 srlx %g4, REAL_HPAGE_SHIFT, %g6
84 and %g6, %g7, %g6
85 sllx %g6, 4, %g6
86 add %g5, %g6, %g5
88 TSB_LOAD_QUAD(%g5, %g6)
89 cmp %g6, %g2
96 TRAP_LOAD_TRAP_BLOCK(%g7, %g6)
[all …]
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| D | trampoline_32.S | 62 ld [%g5 + %g4], %g6
66 add %g6, %sp, %sp
123 ld [%g5 + %g4], %g6
127 add %g6, %sp, %sp
179 ld [%g5 + %g4], %g6
183 add %g6, %sp, %sp
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| D | ivec.S | 29 TRAP_LOAD_IRQ_WORK_PA(%g6, %g1)
31 ldx [%g6], %g5
33 stx %g3, [%g6]
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| D | etrap_64.S | 33 etrap_syscall: TRAP_LOAD_THREAD_REG(%g6, %g1)
48 add %g6, %g2, %g2
80 ldx [%g6 + TI_FLAGS], %g3
87 mov %g6, %l6
132 stx %g6, [%sp + PTREGS_OFF + PT_V9_G6]
146 mov %l6, %g6
148 LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %l1)
149 ldx [%g6 + TI_TASK], %g4
175 TRAP_LOAD_THREAD_REG(%g6, %g1)
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| D | hvtramp.S | 105 mov %l6, %g6
106 ldx [%g6 + TI_TASK], %g4
111 add %g6, %g5, %sp
122 mov %g6, %o0
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| D | utrap.S | 4 TRAP_LOAD_THREAD_REG(%g6, %g1)
5 ldx [%g6 + TI_UTRAPS], %g1
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| D | sun4v_tlb_miss.S | 55 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_itlb_4v)
60 cmp %g2, %g6
74 ldxa [%g0] ASI_SCRATCHPAD, %g6
80 ldx [%g6 + HV_FAULT_I_CTX_OFFSET], %o1 ! ctx
101 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_dtlb_4v)
106 cmp %g2, %g6
117 ldxa [%g0] ASI_SCRATCHPAD, %g6
123 ldx [%g6 + HV_FAULT_D_CTX_OFFSET], %o1 ! ctx
206 ldxa [%g0] ASI_SCRATCHPAD, %g6
207 ldx [%g6 + HV_FAULT_I_CTX_OFFSET], %o1
[all …]
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| D | syscalls.S | 64 1: ldx [%g6 + TI_FLAGS], %l5
114 stb %g0, [%g6 + TI_NEW_CHILD]
119 ldx [%g6 + TI_FLAGS], %l0
148 stb %g0, [%g6 + TI_WSAVED]
229 ldx [%g6 + TI_FLAGS], %l0 ! Load
253 ldx [%g6 + TI_FLAGS], %l0 ! Load
290 ldub [%g6 + TI_SYS_NOERROR], %l2
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| D | head_32.S | 184 set 0x4000, %g6
185 cmp %g7, %g6
256 set 0x8000, %g6 ! AC bit mask
257 or %g5, %g6, %g6 ! Or it in...
258 sta %g6, [%g0] ASI_M_MMUREGS ! Close your eyes...
377 or %o0, %g0, %g6
545 set init_thread_union, %g6
548 st %g6, [%g2]
551 st %g6, [%g2]
553 st %g0, [%g6 + TI_UWINMASK]
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| D | trampoline_64.S | 292 set 0xdeadbeef, %g6
336 sethi %hi(init_thread_union), %g6
337 or %g6, %lo(init_thread_union), %g6
393 ldx [%l0], %g6
394 ldx [%g6 + TI_TASK], %g4
399 add %g6, %g5, %sp
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| D | asm-offsets.c | 40 OFFSET(SC_REG_G6, saved_context, g6); in sparc64_foo()
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| /arch/sparc/prom/ |
| D | cif.S | 20 mov %g6, %l3
25 mov %l3, %g6
34 TRAP_LOAD_THREAD_REG(%g6, %g1)
35 LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %o0)
36 ldx [%g6 + TI_TASK], %g4
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| /arch/sparc/include/asm/ |
| D | hibernate.h | 20 unsigned long g6; member
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| /arch/sparc/power/ |
| D | hibernate_asm.S | 36 stx %g6, [%g3 + SC_REG_G6]
117 ldxa [%g3 + SC_REG_G6] %asi, %g6
|