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/arch/arm/mach-pxa/include/mach/
Dhardware.h107 #define __cpu_is_pxa210(id) \ argument
109 unsigned int _id = (id) & 0xf3f0; \
113 #define __cpu_is_pxa250(id) \ argument
115 unsigned int _id = (id) & 0xf3ff; \
119 #define __cpu_is_pxa255(id) \ argument
121 unsigned int _id = (id) & 0xffff; \
125 #define __cpu_is_pxa25x(id) \ argument
127 unsigned int _id = (id) & 0xf300; \
131 #define __cpu_is_pxa210(id) (0) argument
132 #define __cpu_is_pxa250(id) (0) argument
[all …]
/arch/powerpc/mm/
Dmmu_context_nohash.c85 static unsigned int steal_context_smp(unsigned int id) in steal_context_smp() argument
95 mm = context_mm[id]; in steal_context_smp()
101 id++; in steal_context_smp()
102 if (id > last_context) in steal_context_smp()
103 id = first_context; in steal_context_smp()
106 pr_hardcont(" | steal %d from 0x%p", id, mm); in steal_context_smp()
109 mm->context.id = MMU_NO_CONTEXT; in steal_context_smp()
120 __set_bit(id, stale_map[i]); in steal_context_smp()
124 return id; in steal_context_smp()
143 unsigned int id; in steal_all_contexts() local
[all …]
/arch/s390/include/asm/
Ddebug.h52 typedef int (debug_header_proc_t) (debug_info_t* id,
58 typedef int (debug_format_proc_t) (debug_info_t* id,
61 typedef int (debug_prolog_proc_t) (debug_info_t* id,
64 typedef int (debug_input_proc_t) (debug_info_t* id,
70 int debug_dflt_header_fn(debug_info_t* id, struct debug_view* view,
88 debug_entry_t* debug_event_common(debug_info_t* id, int level,
91 debug_entry_t* debug_exception_common(debug_info_t* id, int level,
103 void debug_unregister(debug_info_t* id);
105 void debug_set_level(debug_info_t* id, int new_level);
110 static inline bool debug_level_enabled(debug_info_t* id, int level) in debug_level_enabled() argument
[all …]
/arch/blackfin/mach-bf609/
DKconfig38 The slave interface id of each slot should be set according following table.
55 int "Slot 0 slave interface id"
60 int "Slot 1 slave interface id"
65 int "Slot 2 slave interface id"
70 int "Slot 3 slave interface id"
75 int "Slot 4 slave interface id"
80 int "Slot 5 slave interface id"
85 int "Slot 6 slave interface id"
90 int "Slot 7 slave interface id"
95 int "Slot 8 slave interface id"
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/arch/s390/kernel/
Ddebug.c79 static int debug_prolog_level_fn(debug_info_t * id,
81 static int debug_input_level_fn(debug_info_t * id, struct debug_view *view,
84 static int debug_prolog_pages_fn(debug_info_t * id,
86 static int debug_input_pages_fn(debug_info_t * id, struct debug_view *view,
89 static int debug_input_flush_fn(debug_info_t * id, struct debug_view *view,
92 static int debug_hex_ascii_format_fn(debug_info_t * id, struct debug_view *view,
94 static int debug_raw_format_fn(debug_info_t * id,
97 static int debug_raw_header_fn(debug_info_t * id, struct debug_view *view,
100 static int debug_sprintf_format_fn(debug_info_t * id, struct debug_view *view,
474 if (act_entry->id.stck == 0LL) in debug_format_entry()
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/arch/s390/kvm/
Dtrace-s390.h42 TP_PROTO(unsigned int id, struct kvm_vcpu *vcpu,
44 TP_ARGS(id, vcpu, sie_block),
47 __field(unsigned int, id)
53 __entry->id = id;
58 TP_printk("create cpu %d at %p, sie block at %p", __entry->id,
63 TP_PROTO(unsigned int id),
64 TP_ARGS(id),
67 __field(unsigned int, id)
71 __entry->id = id;
74 TP_printk("destroy cpu %d", __entry->id)
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/arch/arm/mach-davinci/include/mach/
Dtime.h26 #define IS_TIMER1(id) (id & 0x2) argument
27 #define IS_TIMER0(id) (!IS_TIMER1(id)) argument
28 #define IS_TIMER_TOP(id) ((id & 0x1)) argument
29 #define IS_TIMER_BOT(id) (!IS_TIMER_TOP(id)) argument
31 #define ID_TO_TIMER(id) (IS_TIMER1(id) != 0) argument
/arch/mips/paravirt/
Dparavirt-smp.c46 int id; in paravirt_smp_setup() local
53 for (id = 0; id < NR_CPUS; id++) { in paravirt_smp_setup()
54 set_cpu_possible(id, id == 0); in paravirt_smp_setup()
55 set_cpu_present(id, id == 0); in paravirt_smp_setup()
60 for (id = 0; id < numcpus; id++) { in paravirt_smp_setup()
61 set_cpu_possible(id, true); in paravirt_smp_setup()
62 set_cpu_present(id, true); in paravirt_smp_setup()
63 __cpu_number_map[id] = id; in paravirt_smp_setup()
64 __cpu_logical_map[id] = id; in paravirt_smp_setup()
/arch/mips/bcm63xx/
Dtimer.c56 int bcm63xx_timer_enable(int id) in bcm63xx_timer_enable() argument
61 if (id >= BCM63XX_TIMER_COUNT) in bcm63xx_timer_enable()
66 reg = bcm_timer_readl(TIMER_CTLx_REG(id)); in bcm63xx_timer_enable()
68 bcm_timer_writel(reg, TIMER_CTLx_REG(id)); in bcm63xx_timer_enable()
71 reg |= TIMER_IRQSTAT_TIMER_IR_EN(id); in bcm63xx_timer_enable()
80 int bcm63xx_timer_disable(int id) in bcm63xx_timer_disable() argument
85 if (id >= BCM63XX_TIMER_COUNT) in bcm63xx_timer_disable()
90 reg = bcm_timer_readl(TIMER_CTLx_REG(id)); in bcm63xx_timer_disable()
92 bcm_timer_writel(reg, TIMER_CTLx_REG(id)); in bcm63xx_timer_disable()
95 reg &= ~TIMER_IRQSTAT_TIMER_IR_EN(id); in bcm63xx_timer_disable()
[all …]
Ddev-uart.c39 .id = 0,
46 .id = 1,
52 int __init bcm63xx_uart_register(unsigned int id) in bcm63xx_uart_register() argument
54 if (id >= ARRAY_SIZE(bcm63xx_uart_devices)) in bcm63xx_uart_register()
57 if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() && in bcm63xx_uart_register()
61 if (id == 0) { in bcm63xx_uart_register()
68 if (id == 1) { in bcm63xx_uart_register()
75 return platform_device_register(&bcm63xx_uart_devices[id]); in bcm63xx_uart_register()
/arch/avr32/mach-at32ap/include/mach/
Dboard.h37 struct platform_device *at32_add_device_usart(unsigned int id);
40 at32_add_device_eth(unsigned int id, struct macb_platform_data *data);
44 at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
49 at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_pdata *data,
55 at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
61 at32_add_device_ide(unsigned int id, unsigned int extint,
79 at32_add_device_ssc(unsigned int id, unsigned int flags);
82 struct platform_device *at32_add_device_twi(unsigned int id,
88 at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
92 at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
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/arch/m68k/emu/
Dnatfeat.c68 long id = nf_get_id("NF_SHUTDOWN"); in nf_poweroff() local
70 if (id) in nf_poweroff()
71 nf_call(id); in nf_poweroff()
76 unsigned long id, version; in nf_init() local
79 id = nf_get_id("NF_VERSION"); in nf_init()
80 if (!id) in nf_init()
82 version = nf_call(id); in nf_init()
84 id = nf_get_id("NF_NAME"); in nf_init()
85 if (!id) in nf_init()
87 nf_call(id, virt_to_phys(buf), 256); in nf_init()
/arch/arm/mach-s3c64xx/
Dmach-crag6410-module.c295 u8 id; member
303 { .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
304 { .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
305 { .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
306 { .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
307 { .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
310 { .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
311 { .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
312 { .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
313 { .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
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/arch/mips/ath79/
Dsetup.c63 u32 id; in ath79_detect_sys_type() local
68 id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID); in ath79_detect_sys_type()
69 major = id & REV_ID_MAJOR_MASK; in ath79_detect_sys_type()
73 minor = id & AR71XX_REV_ID_MINOR_MASK; in ath79_detect_sys_type()
74 rev = id >> AR71XX_REV_ID_REVISION_SHIFT; in ath79_detect_sys_type()
97 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
103 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
109 rev = id & AR724X_REV_ID_REVISION_MASK; in ath79_detect_sys_type()
113 minor = id & AR913X_REV_ID_MINOR_MASK; in ath79_detect_sys_type()
114 rev = id >> AR913X_REV_ID_REVISION_SHIFT; in ath79_detect_sys_type()
[all …]
/arch/arm/mach-imx/
Ddevices-imx35.h20 #define imx35_add_flexcan(id) \ argument
21 imx_add_flexcan(&imx35_flexcan_data[id])
30 #define imx35_add_imx_i2c(id, pdata) \ argument
31 imx_add_imx_i2c(&imx35_imx_i2c_data[id], pdata)
41 #define imx35_add_imx_ssi(id, pdata) \ argument
42 imx_add_imx_ssi(&imx35_imx_ssi_data[id], pdata)
45 #define imx35_add_imx_uart(id, pdata) \ argument
46 imx_add_imx_uart_1irq(&imx35_imx_uart_data[id], pdata)
79 #define imx35_add_sdhci_esdhc_imx(id, pdata) \ argument
80 imx_add_sdhci_esdhc_imx(&imx35_sdhci_esdhc_imx_data[id], pdata)
[all …]
Ddevices-imx27.h32 #define imx27_add_imx_i2c(id, pdata) \ argument
33 imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata)
40 #define imx27_add_imx_ssi(id, pdata) \ argument
41 imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata)
44 #define imx27_add_imx_uart(id, pdata) \ argument
45 imx_add_imx_uart_1irq(&imx27_imx_uart_data[id], pdata)
65 #define imx27_add_mxc_ehci_hs(id, pdata) \ argument
66 imx_add_mxc_ehci(&imx27_mxc_ehci_hs_data[id - 1], pdata)
69 #define imx27_add_mxc_mmc(id, pdata) \ argument
70 imx_add_mxc_mmc(&imx27_mxc_mmc_data[id], pdata)
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Ddevices-imx31.h20 #define imx31_add_imx_i2c(id, pdata) \ argument
21 imx_add_imx_i2c(&imx31_imx_i2c_data[id], pdata)
31 #define imx31_add_imx_ssi(id, pdata) \ argument
32 imx_add_imx_ssi(&imx31_imx_ssi_data[id], pdata)
35 #define imx31_add_imx_uart(id, pdata) \ argument
36 imx_add_imx_uart_1irq(&imx31_imx_uart_data[id], pdata)
55 #define imx31_add_mxc_ehci_hs(id, pdata) \ argument
56 imx_add_mxc_ehci(&imx31_mxc_ehci_hs_data[id - 1], pdata)
59 #define imx31_add_mxc_mmc(id, pdata) \ argument
60 imx_add_mxc_mmc(&imx31_mxc_mmc_data[id], pdata)
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/arch/mips/ralink/
Dreset.c28 unsigned long id) in ralink_assert_device() argument
32 if (id < 8) in ralink_assert_device()
36 val |= BIT(id); in ralink_assert_device()
43 unsigned long id) in ralink_deassert_device() argument
47 if (id < 8) in ralink_deassert_device()
51 val &= ~BIT(id); in ralink_deassert_device()
58 unsigned long id) in ralink_reset_device() argument
60 ralink_assert_device(rcdev, id); in ralink_reset_device()
61 return ralink_deassert_device(rcdev, id); in ralink_reset_device()
/arch/mips/cavium-octeon/
Dsmp.c104 int id; in octeon_smp_setup() local
111 for (id = 0; id < NR_CPUS; id++) { in octeon_smp_setup()
112 set_cpu_possible(id, id == 0); in octeon_smp_setup()
113 set_cpu_present(id, id == 0); in octeon_smp_setup()
121 for (id = 0; id < NR_CPUS; id++) { in octeon_smp_setup()
122 if ((id != coreid) && (core_mask & (1 << id))) { in octeon_smp_setup()
125 __cpu_number_map[id] = cpus; in octeon_smp_setup()
126 __cpu_logical_map[cpus] = id; in octeon_smp_setup()
137 for (id = 0; setup_max_cpus && octeon_bootloader_entry_addr && in octeon_smp_setup()
138 id < num_cores && id < NR_CPUS; id++) { in octeon_smp_setup()
[all …]
/arch/mips/sgi-ip22/
Dip22-gio.c18 __u8 id; member
20 { .name = "SGI Impact", .id = 0x10 },
21 { .name = "Phobos G160", .id = 0x35 },
22 { .name = "Phobos G130", .id = 0x36 },
23 { .name = "Phobos G100", .id = 0x37 },
24 { .name = "Set Engineering GFE", .id = 0x38 },
26 { .name = "SGI Newport", .id = 0x7e },
27 { .name = "SGI GR2/GR3", .id = 0x7f },
54 for (ids = match; ids->id != 0xff; ids++) in gio_match_device()
55 if (ids->id == dev->id.id) in gio_match_device()
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/arch/arm/mach-pxa/
Ddevices.c45 .id = -1,
77 .id = 0,
118 .id = -1,
129 .id = -1,
154 .id = -1,
182 .id = -1,
211 .id = 0,
235 .id = 1,
259 .id = 2,
283 .id = 3,
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/arch/arm/kvm/
Dcoproc.c526 static bool index_to_params(u64 id, struct coproc_params *params) in index_to_params() argument
528 switch (id & KVM_REG_SIZE_MASK) { in index_to_params()
531 if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK in index_to_params()
540 params->CRn = ((id & KVM_REG_ARM_32_CRN_MASK) in index_to_params()
542 params->CRm = ((id & KVM_REG_ARM_CRM_MASK) in index_to_params()
544 params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK) in index_to_params()
546 params->Op2 = ((id & KVM_REG_ARM_32_OPC2_MASK) in index_to_params()
551 if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK in index_to_params()
558 params->CRn = ((id & KVM_REG_ARM_CRM_MASK) in index_to_params()
560 params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK) in index_to_params()
[all …]
Dguest.c44 static u64 core_reg_offset_from_id(u64 id) in core_reg_offset_from_id() argument
46 return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE); in core_reg_offset_from_id()
55 if (KVM_REG_SIZE(reg->id) != 4) in get_core_reg()
59 off = core_reg_offset_from_id(reg->id); in get_core_reg()
60 if (off >= sizeof(*regs) / KVM_REG_SIZE(reg->id)) in get_core_reg()
72 if (KVM_REG_SIZE(reg->id) != 4) in set_core_reg()
76 off = core_reg_offset_from_id(reg->id); in set_core_reg()
77 if (off >= sizeof(*regs) / KVM_REG_SIZE(reg->id)) in set_core_reg()
145 ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)); in set_timer_reg()
149 return kvm_arm_timer_set_reg(vcpu, reg->id, val); in set_timer_reg()
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/arch/mips/include/asm/mach-bcm63xx/
Dbcm63xx_timer.h4 int bcm63xx_timer_register(int id, void (*callback)(void *data), void *data);
5 void bcm63xx_timer_unregister(int id);
6 int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us);
7 int bcm63xx_timer_enable(int id);
8 int bcm63xx_timer_disable(int id);
/arch/um/kernel/skas/
Dmmu.c61 to_mm->id.stack = stack; in init_new_context()
67 to_mm->id.u.pid = copy_context_skas0(stack, in init_new_context()
68 from_mm->id.u.pid); in init_new_context()
69 else to_mm->id.u.pid = start_userspace(stack); in init_new_context()
72 if (to_mm->id.u.pid < 0) { in init_new_context()
73 ret = to_mm->id.u.pid; in init_new_context()
87 if (to_mm->id.stack != 0) in init_new_context()
88 free_page(to_mm->id.stack); in init_new_context()
102 ret = init_stub_pte(mm, STUB_DATA, mm->context.id.stack); in uml_setup_stubs()
107 mm->context.stub_pages[1] = virt_to_page(mm->context.id.stack); in uml_setup_stubs()
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