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Searched refs:idx (Results 1 – 25 of 276) sorted by relevance

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/arch/x86/um/
Dtls_32.c66 int idx; in get_free_idx() local
71 for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++) in get_free_idx()
72 if (!t->arch.tls_array[idx].present) in get_free_idx()
73 return idx + GDT_ENTRY_TLS_MIN; in get_free_idx()
95 int idx; in load_TLS() local
97 for (idx = GDT_ENTRY_TLS_MIN; idx < GDT_ENTRY_TLS_MAX; idx++) { in load_TLS()
99 &to->thread.arch.tls_array[idx - GDT_ENTRY_TLS_MIN]; in load_TLS()
108 curr->tls.entry_number = idx; in load_TLS()
204 int idx, int flushed) in set_tls_entry() argument
208 if (idx < GDT_ENTRY_TLS_MIN || idx > GDT_ENTRY_TLS_MAX) in set_tls_entry()
[all …]
/arch/blackfin/kernel/cplb-nompu/
Dcplbmgr.c39 static inline void write_dcplb_data(int cpu, int idx, unsigned long data, in write_dcplb_data() argument
43 bfin_write32(DCPLB_DATA0 + idx * 4, data); in write_dcplb_data()
44 bfin_write32(DCPLB_ADDR0 + idx * 4, addr); in write_dcplb_data()
48 dcplb_tbl[cpu][idx].addr = addr; in write_dcplb_data()
49 dcplb_tbl[cpu][idx].data = data; in write_dcplb_data()
53 static inline void write_icplb_data(int cpu, int idx, unsigned long data, in write_icplb_data() argument
57 bfin_write32(ICPLB_DATA0 + idx * 4, data); in write_icplb_data()
58 bfin_write32(ICPLB_ADDR0 + idx * 4, addr); in write_icplb_data()
62 icplb_tbl[cpu][idx].addr = addr; in write_icplb_data()
63 icplb_tbl[cpu][idx].data = data; in write_icplb_data()
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/arch/frv/mb93090-mb00/
Dpci-frv.c86 int idx; in pcibios_allocate_bus_resources() local
93 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { in pcibios_allocate_bus_resources()
94 r = &dev->resource[idx]; in pcibios_allocate_bus_resources()
97 pci_claim_bridge_resource(dev, idx); in pcibios_allocate_bus_resources()
107 int idx, disabled; in pcibios_allocate_resources() local
113 for(idx = 0; idx < 6; idx++) { in pcibios_allocate_resources()
114 r = &dev->resource[idx]; in pcibios_allocate_resources()
126 if (pci_claim_resource(dev, idx) < 0) { in pcibios_allocate_resources()
150 int idx; in pcibios_assign_resources() local
160 for(idx=0; idx<6; idx++) { in pcibios_assign_resources()
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/arch/arm64/kernel/
Dperf_event.c254 static inline int armv8pmu_counter_valid(struct arm_pmu *cpu_pmu, int idx) in armv8pmu_counter_valid() argument
256 return idx >= ARMV8_IDX_CYCLE_COUNTER && in armv8pmu_counter_valid()
257 idx <= ARMV8_IDX_COUNTER_LAST(cpu_pmu); in armv8pmu_counter_valid()
260 static inline int armv8pmu_counter_has_overflowed(u32 pmnc, int idx) in armv8pmu_counter_has_overflowed() argument
262 return pmnc & BIT(ARMV8_IDX_TO_COUNTER(idx)); in armv8pmu_counter_has_overflowed()
265 static inline int armv8pmu_select_counter(int idx) in armv8pmu_select_counter() argument
267 u32 counter = ARMV8_IDX_TO_COUNTER(idx); in armv8pmu_select_counter()
271 return idx; in armv8pmu_select_counter()
278 int idx = hwc->idx; in armv8pmu_read_counter() local
281 if (!armv8pmu_counter_valid(cpu_pmu, idx)) in armv8pmu_read_counter()
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/arch/x86/kernel/cpu/
Dperf_event_intel_uncore_nhmex.c243 if (hwc->idx == UNCORE_PMC_IDX_FIXED) in nhmex_uncore_msr_enable_event()
364 reg1->idx = 0; in nhmex_bbox_hw_config()
376 if (reg1->idx != EXTRA_REG_NONE) { in nhmex_bbox_msr_enable_event()
449 reg1->idx = 0; in nhmex_sbox_hw_config()
461 if (reg1->idx != EXTRA_REG_NONE) { in nhmex_sbox_msr_enable_event()
546 static bool nhmex_mbox_get_shared_reg(struct intel_uncore_box *box, int idx, u64 config) in nhmex_mbox_get_shared_reg() argument
553 if (idx < EXTRA_REG_NHMEX_M_ZDP_CTL_FVC) { in nhmex_mbox_get_shared_reg()
554 er = &box->shared_regs[idx]; in nhmex_mbox_get_shared_reg()
570 idx -= EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; in nhmex_mbox_get_shared_reg()
571 if (WARN_ON_ONCE(idx >= 4)) in nhmex_mbox_get_shared_reg()
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/arch/sh/kernel/cpu/sh5/
Dclock-sh5.c27 int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007; in master_clk_init() local
28 clk->rate *= ifc_table[idx]; in master_clk_init()
37 int idx = (__raw_readw(cprc_base) >> 12) & 0x0007; in module_clk_recalc() local
38 return clk->parent->rate / ifc_table[idx]; in module_clk_recalc()
47 int idx = (__raw_readw(cprc_base) >> 3) & 0x0007; in bus_clk_recalc() local
48 return clk->parent->rate / ifc_table[idx]; in bus_clk_recalc()
57 int idx = (__raw_readw(cprc_base) & 0x0007); in cpu_clk_recalc() local
58 return clk->parent->rate / ifc_table[idx]; in cpu_clk_recalc()
72 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
77 if (idx < ARRAY_SIZE(sh5_clk_ops)) in arch_init_clk_ops()
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/arch/x86/kernel/
Dtls.c23 int idx; in get_free_idx() local
25 for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++) in get_free_idx()
26 if (desc_empty(&t->tls_array[idx])) in get_free_idx()
27 return idx + GDT_ENTRY_TLS_MIN; in get_free_idx()
83 static void set_tls_desc(struct task_struct *p, int idx, in set_tls_desc() argument
87 struct desc_struct *desc = &t->tls_array[idx - GDT_ENTRY_TLS_MIN]; in set_tls_desc()
113 int do_set_thread_area(struct task_struct *p, int idx, in do_set_thread_area() argument
126 if (idx == -1) in do_set_thread_area()
127 idx = info.entry_number; in do_set_thread_area()
133 if (idx == -1 && can_allocate) { in do_set_thread_area()
[all …]
/arch/sh/kernel/cpu/sh3/
Dclock-sh3.c32 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
34 clk->rate *= pfc_divisors[idx]; in master_clk_init()
44 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
46 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
56 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local
58 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
68 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
70 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
84 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
86 if (idx < ARRAY_SIZE(sh3_clk_ops)) in arch_init_clk_ops()
[all …]
Dclock-sh7706.c28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
30 clk->rate *= pfc_divisors[idx]; in master_clk_init()
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
52 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local
54 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
64 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
66 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
80 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
82 if (idx < ARRAY_SIZE(sh7706_clk_ops)) in arch_init_clk_ops()
[all …]
Dclock-sh7709.c28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
30 clk->rate *= pfc_divisors[idx]; in master_clk_init()
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
52 int idx = (frqcr & 0x0080) ? in bus_clk_recalc() local
55 return clk->parent->rate * stc_multipliers[idx]; in bus_clk_recalc()
65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
67 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
81 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
83 if (idx < ARRAY_SIZE(sh7709_clk_ops)) in arch_init_clk_ops()
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Dclock-sh7712.c27 int idx = (frqcr & 0x0300) >> 8; in master_clk_init() local
29 clk->rate *= multipliers[idx]; in master_clk_init()
39 int idx = frqcr & 0x0007; in module_clk_recalc() local
41 return clk->parent->rate / divisors[idx]; in module_clk_recalc()
51 int idx = (frqcr & 0x0030) >> 4; in cpu_clk_recalc() local
53 return clk->parent->rate / divisors[idx]; in cpu_clk_recalc()
66 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
68 if (idx < ARRAY_SIZE(sh7712_clk_ops)) in arch_init_clk_ops()
69 *ops = sh7712_clk_ops[idx]; in arch_init_clk_ops()
Dclock-sh7710.c38 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local
39 return clk->parent->rate / md_table[idx]; in module_clk_recalc()
48 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; in bus_clk_recalc() local
49 return clk->parent->rate / md_table[idx]; in bus_clk_recalc()
58 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; in cpu_clk_recalc() local
59 return clk->parent->rate / md_table[idx]; in cpu_clk_recalc()
73 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
75 if (idx < ARRAY_SIZE(sh7710_clk_ops)) in arch_init_clk_ops()
76 *ops = sh7710_clk_ops[idx]; in arch_init_clk_ops()
Dclock-sh7705.c44 int idx = __raw_readw(FRQCR) & 0x0003; in module_clk_recalc() local
45 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
54 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8; in bus_clk_recalc() local
55 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
64 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4; in cpu_clk_recalc() local
65 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
79 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
81 if (idx < ARRAY_SIZE(sh7705_clk_ops)) in arch_init_clk_ops()
82 *ops = sh7705_clk_ops[idx]; in arch_init_clk_ops()
/arch/arm/mach-omap2/
Dcm2xxx_3xxx.h53 static inline u32 omap2_cm_read_mod_reg(s16 module, u16 idx) in omap2_cm_read_mod_reg() argument
55 return readl_relaxed(cm_base + module + idx); in omap2_cm_read_mod_reg()
58 static inline void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) in omap2_cm_write_mod_reg() argument
60 writel_relaxed(val, cm_base + module + idx); in omap2_cm_write_mod_reg()
65 s16 idx) in omap2_cm_rmw_mod_reg_bits() argument
69 v = omap2_cm_read_mod_reg(module, idx); in omap2_cm_rmw_mod_reg_bits()
72 omap2_cm_write_mod_reg(v, module, idx); in omap2_cm_rmw_mod_reg_bits()
78 static inline u32 omap2_cm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) in omap2_cm_read_mod_bits_shift() argument
82 v = omap2_cm_read_mod_reg(domain, idx); in omap2_cm_read_mod_bits_shift()
89 static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) in omap2_cm_set_mod_reg_bits() argument
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/arch/arm/mm/
Dhighmem.c21 static inline void set_fixmap_pte(int idx, pte_t pte) in set_fixmap_pte() argument
23 unsigned long vaddr = __fix_to_virt(idx); in set_fixmap_pte()
57 unsigned int idx; in kmap_atomic() local
82 idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); in kmap_atomic()
83 vaddr = __fix_to_virt(idx); in kmap_atomic()
96 set_fixmap_pte(idx, mk_pte(page, kmap_prot)); in kmap_atomic()
105 int idx, type; in __kunmap_atomic() local
109 idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic()
114 BUG_ON(vaddr != __fix_to_virt(idx)); in __kunmap_atomic()
115 set_fixmap_pte(idx, __pte(0)); in __kunmap_atomic()
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/arch/sh/kernel/cpu/sh4a/
Dubc.c18 #define UBC_CBR(idx) (0xff200000 + (0x20 * idx)) argument
19 #define UBC_CRR(idx) (0xff200004 + (0x20 * idx)) argument
20 #define UBC_CAR(idx) (0xff200008 + (0x20 * idx)) argument
21 #define UBC_CAMR(idx) (0xff20000c + (0x20 * idx)) argument
35 static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_enable() argument
37 __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx)); in sh4a_ubc_enable()
38 __raw_writel(info->address, UBC_CAR(idx)); in sh4a_ubc_enable()
41 static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_disable() argument
43 __raw_writel(0, UBC_CBR(idx)); in sh4a_ubc_disable()
44 __raw_writel(0, UBC_CAR(idx)); in sh4a_ubc_disable()
Dclock-sh7770.c33 int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f); in module_clk_recalc() local
34 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
43 int idx = (__raw_readl(FRQCR) & 0x000f); in bus_clk_recalc() local
44 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
53 int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f); in cpu_clk_recalc() local
54 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
68 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
70 if (idx < ARRAY_SIZE(sh7770_clk_ops)) in arch_init_clk_ops()
71 *ops = sh7770_clk_ops[idx]; in arch_init_clk_ops()
/arch/metag/mm/
Dhighmem.c42 enum fixed_addresses idx; in kmap_atomic() local
52 idx = type + KM_TYPE_NR * smp_processor_id(); in kmap_atomic()
53 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic()
55 BUG_ON(!pte_none(*(kmap_pte - idx))); in kmap_atomic()
57 set_pte(kmap_pte - idx, mk_pte(page, PAGE_KERNEL)); in kmap_atomic()
66 int idx, type; in __kunmap_atomic() local
70 idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic()
78 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
95 enum fixed_addresses idx; in kmap_atomic_pfn() local
103 idx = type + KM_TYPE_NR * smp_processor_id(); in kmap_atomic_pfn()
[all …]
/arch/mips/mm/
Dhighmem.c48 int idx, type; in kmap_atomic() local
56 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic()
57 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic()
59 BUG_ON(!pte_none(*(kmap_pte - idx))); in kmap_atomic()
61 set_pte(kmap_pte-idx, mk_pte(page, PAGE_KERNEL)); in kmap_atomic()
82 int idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic() local
84 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in __kunmap_atomic()
90 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
107 int idx, type; in kmap_atomic_pfn() local
113 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_pfn()
[all …]
/arch/sh/kernel/cpu/sh4/
Dclock-sh4.c40 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local
41 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
50 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007; in bus_clk_recalc() local
51 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
60 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007; in cpu_clk_recalc() local
61 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
75 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
77 if (idx < ARRAY_SIZE(sh4_clk_ops)) in arch_init_clk_ops()
78 *ops = sh4_clk_ops[idx]; in arch_init_clk_ops()
/arch/metag/kernel/perf/
Dperf_event.c190 struct hw_perf_event *hwc, int idx) in metag_pmu_event_update() argument
206 new_raw_count = metag_pmu->read(idx); in metag_pmu_event_update()
222 struct hw_perf_event *hwc, int idx) in metag_pmu_event_set_period() argument
251 metag_pmu->write(idx, -left & MAX_PERIOD); in metag_pmu_event_set_period()
263 int idx = hwc->idx; in metag_pmu_start() local
265 if (WARN_ON_ONCE(idx == -1)) in metag_pmu_start()
287 metag_pmu_event_set_period(event, hwc, hwc->idx); in metag_pmu_start()
288 cpuc->events[idx] = event; in metag_pmu_start()
289 metag_pmu->enable(hwc, idx); in metag_pmu_start()
301 metag_pmu_event_update(event, hwc, hwc->idx); in metag_pmu_stop()
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/arch/microblaze/mm/
Dhighmem.c38 int idx, type; in kmap_atomic_prot() local
47 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_prot()
48 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_prot()
50 BUG_ON(!pte_none(*(kmap_pte-idx))); in kmap_atomic_prot()
52 set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); in kmap_atomic_prot()
73 unsigned int idx; in __kunmap_atomic() local
75 idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic()
76 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in __kunmap_atomic()
82 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
/arch/powerpc/mm/
Dhighmem.c35 int idx, type; in kmap_atomic_prot() local
43 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_prot()
44 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_prot()
46 BUG_ON(!pte_none(*(kmap_pte-idx))); in kmap_atomic_prot()
48 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1); in kmap_atomic_prot()
70 unsigned int idx; in __kunmap_atomic() local
72 idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic()
73 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in __kunmap_atomic()
79 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
/arch/arc/kernel/
Dperf_event.c85 static uint64_t arc_pmu_read_counter(int idx) in arc_pmu_read_counter() argument
94 write_aux_reg(ARC_REG_PCT_INDEX, idx); in arc_pmu_read_counter()
104 struct hw_perf_event *hwc, int idx) in arc_perf_event_update() argument
107 uint64_t new_raw_count = arc_pmu_read_counter(idx); in arc_perf_event_update()
121 arc_perf_event_update(event, &event->hw, event->hw.idx); in arc_pmu_read()
219 int idx = hwc->idx; in arc_pmu_event_set_period() local
244 write_aux_reg(ARC_REG_PCT_INDEX, idx); in arc_pmu_event_set_period()
263 int idx = hwc->idx; in arc_pmu_start() local
265 if (WARN_ON_ONCE(idx == -1)) in arc_pmu_start()
278 read_aux_reg(ARC_REG_PCT_INT_CTRL) | (1 << idx)); in arc_pmu_start()
[all …]
/arch/blackfin/kernel/cplb-mpu/
Dcplbmgr.c103 int idx; in dcplb_miss() local
127 int idx = page >> 5; in dcplb_miss() local
130 if (mask[idx] & bit) in dcplb_miss()
149 int idx = page >> 5; in dcplb_miss() local
152 if (mask[idx] & bit) in dcplb_miss()
156 if (mask[idx] & bit) in dcplb_miss()
160 idx = evict_one_dcplb(cpu); in dcplb_miss()
163 dcplb_tbl[cpu][idx].addr = addr; in dcplb_miss()
164 dcplb_tbl[cpu][idx].data = d_data; in dcplb_miss()
167 bfin_write32(DCPLB_DATA0 + idx * 4, d_data); in dcplb_miss()
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