| /arch/powerpc/platforms/embedded6xx/ |
| D | flipper-pic.c | 53 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_mask_and_ack() local
56 clrbits32(io_base + FLIPPER_IMR, mask); in flipper_pic_mask_and_ack()
58 out_be32(io_base + FLIPPER_ICR, mask); in flipper_pic_mask_and_ack()
64 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_ack() local
67 out_be32(io_base + FLIPPER_ICR, 1 << irq); in flipper_pic_ack()
73 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_mask() local
75 clrbits32(io_base + FLIPPER_IMR, 1 << irq); in flipper_pic_mask()
81 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_unmask() local
83 setbits32(io_base + FLIPPER_IMR, 1 << irq); in flipper_pic_unmask()
128 static void __flipper_quiesce(void __iomem *io_base) in __flipper_quiesce() argument
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| D | hlwd-pic.c | 50 void __iomem *io_base = irq_data_get_irq_chip_data(d); in hlwd_pic_mask_and_ack() local
53 clrbits32(io_base + HW_BROADWAY_IMR, mask); in hlwd_pic_mask_and_ack()
54 out_be32(io_base + HW_BROADWAY_ICR, mask); in hlwd_pic_mask_and_ack()
60 void __iomem *io_base = irq_data_get_irq_chip_data(d); in hlwd_pic_ack() local
62 out_be32(io_base + HW_BROADWAY_ICR, 1 << irq); in hlwd_pic_ack()
68 void __iomem *io_base = irq_data_get_irq_chip_data(d); in hlwd_pic_mask() local
70 clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq); in hlwd_pic_mask()
76 void __iomem *io_base = irq_data_get_irq_chip_data(d); in hlwd_pic_unmask() local
78 setbits32(io_base + HW_BROADWAY_IMR, 1 << irq); in hlwd_pic_unmask()
81 clrbits32(io_base + HW_STARLET_IMR, 1 << irq); in hlwd_pic_unmask()
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| /arch/mips/ar7/ |
| D | setup.c | 89 unsigned long io_base; in plat_mem_setup() local
95 io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); in plat_mem_setup()
96 if (!io_base) in plat_mem_setup()
98 set_io_port_base(io_base); in plat_mem_setup()
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| /arch/arm/plat-omap/include/plat/ |
| D | dmtimer.h | 107 void __iomem *io_base; member
304 tidr = readl_relaxed(timer->io_base); in __omap_dm_timer_init_regs()
307 timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; in __omap_dm_timer_init_regs()
308 timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; in __omap_dm_timer_init_regs()
309 timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; in __omap_dm_timer_init_regs()
310 timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; in __omap_dm_timer_init_regs()
311 timer->func_base = timer->io_base; in __omap_dm_timer_init_regs()
314 timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; in __omap_dm_timer_init_regs()
315 timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; in __omap_dm_timer_init_regs()
316 timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR; in __omap_dm_timer_init_regs()
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| /arch/arm/mach-orion5x/ |
| D | ts78xx-setup.c | 204 void __iomem *io_base = chip->IO_ADDR_W; in ts78xx_ts_nand_write_buf() local
210 writesb(io_base, buf, sz); in ts78xx_ts_nand_write_buf()
218 writesl(io_base, buf32, sz); in ts78xx_ts_nand_write_buf()
224 writesb(io_base, buf, len); in ts78xx_ts_nand_write_buf()
231 void __iomem *io_base = chip->IO_ADDR_R; in ts78xx_ts_nand_read_buf() local
237 readsb(io_base, buf, sz); in ts78xx_ts_nand_read_buf()
245 readsl(io_base, buf32, sz); in ts78xx_ts_nand_read_buf()
251 readsb(io_base, buf, len); in ts78xx_ts_nand_read_buf()
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| /arch/mips/txx9/generic/ |
| D | pci.c | 117 unsigned long io_base, unsigned long io_size) in txx9_alloc_pci_controller() argument
175 if (io_base) { in txx9_alloc_pci_controller()
176 pcic->mem_resource[1].start = io_base; in txx9_alloc_pci_controller()
177 pcic->mem_resource[1].end = io_base + io_size - 1; in txx9_alloc_pci_controller()
194 io_base = pcic->mem_resource[1].start; in txx9_alloc_pci_controller()
208 io_base - (mips_io_port_base - IO_BASE); in txx9_alloc_pci_controller()
209 pcic->io_offset = io_base - (mips_io_port_base - IO_BASE); in txx9_alloc_pci_controller()
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| /arch/mips/include/asm/txx9/ |
| D | pci.h | 15 unsigned long io_base, unsigned long io_size);
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| /arch/mips/ath79/ |
| D | pci.c | 173 unsigned long io_base, in ath79_register_pci_ar724x() argument
202 res[4].start = io_base; in ath79_register_pci_ar724x()
203 res[4].end = io_base; in ath79_register_pci_ar724x()
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| /arch/powerpc/sysdev/ |
| D | fsl_lbc.c | 155 int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar) in fsl_upm_run_pattern() argument
169 out_8(io_base, 0x0); in fsl_upm_run_pattern()
172 out_be16(io_base, 0x0); in fsl_upm_run_pattern()
175 out_be32(io_base, 0x0); in fsl_upm_run_pattern()
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| /arch/mips/pci/ |
| D | ops-tx3927.c | 133 unsigned long io_base = in tx3927_pcic_setup() local
162 tx3927_pcicptr->ilbioma = io_base; in tx3927_pcic_setup()
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| /arch/mips/include/asm/netlogic/ |
| D | psb-bootinfo.h | 40 uint64_t io_base; member
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| /arch/arm/mach-cns3xxx/ |
| D | pcie.c | 236 u16 io_base = cnspci->res_io.start >> 16; in cns3xxx_pcie_hw_init() local
244 cns3xxx_write_config(cnspci, PCI_IO_BASE_UPPER16, 2, io_base); in cns3xxx_pcie_hw_init()
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| /arch/arm/mach-omap2/ |
| D | timer.c | 259 timer->io_base = of_iomap(np, 0); in omap_dm_timer_init_one()
289 timer->io_base = ioremap(mem.start, mem.end - mem.start); in omap_dm_timer_init_one()
292 if (!timer->io_base) in omap_dm_timer_init_one()
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| /arch/powerpc/include/asm/ |
| D | fsl_lbc.h | 305 extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base,
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| /arch/arm/plat-omap/ |
| D | dmtimer.c | 831 timer->io_base = devm_ioremap_resource(dev, mem); in omap_dm_timer_probe()
832 if (IS_ERR(timer->io_base)) in omap_dm_timer_probe()
833 return PTR_ERR(timer->io_base); in omap_dm_timer_probe()
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