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1 /*   -*- linux-c -*-
2  *   include/asm-blackfin/ipipe.h
3  *
4  *   Copyright (C) 2002-2007 Philippe Gerum.
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
9  *   USA; either version 2 of the License, or (at your option) any later
10  *   version.
11  *
12  *   This program is distributed in the hope that it will be useful,
13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  *   GNU General Public License for more details.
16  *
17  *   You should have received a copy of the GNU General Public License
18  *   along with this program; if not, write to the Free Software
19  *   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20  */
21 
22 #ifndef __ASM_BLACKFIN_IPIPE_H
23 #define __ASM_BLACKFIN_IPIPE_H
24 
25 #ifdef CONFIG_IPIPE
26 
27 #include <linux/cpumask.h>
28 #include <linux/list.h>
29 #include <linux/threads.h>
30 #include <linux/irq.h>
31 #include <linux/ipipe_percpu.h>
32 #include <asm/ptrace.h>
33 #include <asm/irq.h>
34 #include <asm/bitops.h>
35 #include <linux/atomic.h>
36 #include <asm/traps.h>
37 #include <asm/bitsperlong.h>
38 
39 #define IPIPE_ARCH_STRING     "1.16-01"
40 #define IPIPE_MAJOR_NUMBER    1
41 #define IPIPE_MINOR_NUMBER    16
42 #define IPIPE_PATCH_NUMBER    1
43 
44 #ifdef CONFIG_SMP
45 #error "I-pipe/blackfin: SMP not implemented"
46 #else /* !CONFIG_SMP */
47 #define ipipe_processor_id()	0
48 #endif	/* CONFIG_SMP */
49 
50 #define prepare_arch_switch(next)		\
51 do {						\
52 	ipipe_schedule_notify(current, next);	\
53 	hard_local_irq_disable();			\
54 } while (0)
55 
56 #define task_hijacked(p)						\
57 	({								\
58 		int __x__ = __ipipe_root_domain_p;			\
59 		if (__x__)						\
60 			hard_local_irq_enable();			\
61 		!__x__;							\
62 	})
63 
64 struct ipipe_domain;
65 
66 struct ipipe_sysinfo {
67 	int sys_nr_cpus;	/* Number of CPUs on board */
68 	int sys_hrtimer_irq;	/* hrtimer device IRQ */
69 	u64 sys_hrtimer_freq;	/* hrtimer device frequency */
70 	u64 sys_hrclock_freq;	/* hrclock device frequency */
71 	u64 sys_cpu_freq;	/* CPU frequency (Hz) */
72 };
73 
74 #define ipipe_read_tsc(t)					\
75 	({							\
76 	unsigned long __cy2;					\
77 	__asm__ __volatile__ ("1: %0 = CYCLES2\n"		\
78 				"%1 = CYCLES\n"			\
79 				"%2 = CYCLES2\n"		\
80 				"CC = %2 == %0\n"		\
81 				"if ! CC jump 1b\n"		\
82 				: "=d,a" (((unsigned long *)&t)[1]),	\
83 				  "=d,a" (((unsigned long *)&t)[0]),	\
84 				  "=d,a" (__cy2)				\
85 				: /*no input*/ : "CC");			\
86 	t;								\
87 	})
88 
89 #define ipipe_cpu_freq()	__ipipe_core_clock
90 #define ipipe_tsc2ns(_t)	(((unsigned long)(_t)) * __ipipe_freq_scale)
91 #define ipipe_tsc2us(_t)	(ipipe_tsc2ns(_t) / 1000 + 1)
92 
93 /* Private interface -- Internal use only */
94 
95 #define __ipipe_check_platform()	do { } while (0)
96 
97 #define __ipipe_init_platform()		do { } while (0)
98 
99 extern atomic_t __ipipe_irq_lvdepth[IVG15 + 1];
100 
101 extern unsigned long __ipipe_irq_lvmask;
102 
103 extern struct ipipe_domain ipipe_root;
104 
105 /* enable/disable_irqdesc _must_ be used in pairs. */
106 
107 void __ipipe_enable_irqdesc(struct ipipe_domain *ipd,
108 			    unsigned irq);
109 
110 void __ipipe_disable_irqdesc(struct ipipe_domain *ipd,
111 			     unsigned irq);
112 
113 #define __ipipe_enable_irq(irq)						\
114 	do {								\
115 		struct irq_desc *desc = irq_to_desc(irq);		\
116 		struct irq_chip *chip = get_irq_desc_chip(desc);	\
117 		chip->irq_unmask(&desc->irq_data);			\
118 	} while (0)
119 
120 #define __ipipe_disable_irq(irq)					\
121 	do {								\
122 		struct irq_desc *desc = irq_to_desc(irq);		\
123 		struct irq_chip *chip = get_irq_desc_chip(desc);	\
124 		chip->irq_mask(&desc->irq_data);			\
125 	} while (0)
126 
__ipipe_check_tickdev(const char * devname)127 static inline int __ipipe_check_tickdev(const char *devname)
128 {
129 	return 1;
130 }
131 
132 void __ipipe_enable_pipeline(void);
133 
134 #define __ipipe_hook_critical_ipi(ipd) do { } while (0)
135 
136 void ___ipipe_sync_pipeline(void);
137 
138 void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);
139 
140 int __ipipe_get_irq_priority(unsigned int irq);
141 
142 void __ipipe_serial_debug(const char *fmt, ...);
143 
144 asmlinkage void __ipipe_call_irqtail(unsigned long addr);
145 
146 DECLARE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
147 
148 extern unsigned long __ipipe_core_clock;
149 
150 extern unsigned long __ipipe_freq_scale;
151 
152 extern unsigned long __ipipe_irq_tail_hook;
153 
__ipipe_ffnz(unsigned long ul)154 static inline unsigned long __ipipe_ffnz(unsigned long ul)
155 {
156 	return ffs(ul) - 1;
157 }
158 
159 #define __ipipe_do_root_xirq(ipd, irq)					\
160 	((ipd)->irqs[irq].handler(irq, raw_cpu_ptr(&__ipipe_tick_regs)))
161 
162 #define __ipipe_run_irqtail(irq)  /* Must be a macro */			\
163 	do {								\
164 		unsigned long __pending;				\
165 		CSYNC();						\
166 		__pending = bfin_read_IPEND();				\
167 		if (__pending & 0x8000) {				\
168 			__pending &= ~0x8010;				\
169 			if (__pending && (__pending & (__pending - 1)) == 0) \
170 				__ipipe_call_irqtail(__ipipe_irq_tail_hook); \
171 		}							\
172 	} while (0)
173 
174 #define __ipipe_syscall_watched_p(p, sc)	\
175 	(ipipe_notifier_enabled_p(p) || (unsigned long)sc >= NR_syscalls)
176 
177 #ifdef CONFIG_BF561
178 #define bfin_write_TIMER_DISABLE(val)	bfin_write_TMRS8_DISABLE(val)
179 #define bfin_write_TIMER_ENABLE(val)	bfin_write_TMRS8_ENABLE(val)
180 #define bfin_write_TIMER_STATUS(val)	bfin_write_TMRS8_STATUS(val)
181 #define bfin_read_TIMER_STATUS()	bfin_read_TMRS8_STATUS()
182 #elif defined(CONFIG_BF54x)
183 #define bfin_write_TIMER_DISABLE(val)	bfin_write_TIMER_DISABLE0(val)
184 #define bfin_write_TIMER_ENABLE(val)	bfin_write_TIMER_ENABLE0(val)
185 #define bfin_write_TIMER_STATUS(val)	bfin_write_TIMER_STATUS0(val)
186 #define bfin_read_TIMER_STATUS(val)	bfin_read_TIMER_STATUS0(val)
187 #endif
188 
189 #define __ipipe_root_tick_p(regs)	((regs->ipend & 0x10) != 0)
190 
191 #else /* !CONFIG_IPIPE */
192 
193 #define task_hijacked(p)		0
194 #define ipipe_trap_notify(t, r)  	0
195 #define __ipipe_root_tick_p(regs)	1
196 
197 #endif /* !CONFIG_IPIPE */
198 
199 #ifdef CONFIG_TICKSOURCE_CORETMR
200 #define IRQ_SYSTMR		IRQ_CORETMR
201 #define IRQ_PRIOTMR		IRQ_CORETMR
202 #else
203 #define IRQ_SYSTMR		IRQ_TIMER0
204 #define IRQ_PRIOTMR		CONFIG_IRQ_TIMER0
205 #endif
206 
207 #define ipipe_update_tick_evtdev(evtdev)	do { } while (0)
208 
209 #endif	/* !__ASM_BLACKFIN_IPIPE_H */
210