/arch/arm/mach-ks8695/include/mach/ |
D | entry-macro.S | 21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 27 mov \irqnr, #0 31 addeq \irqnr, \irqnr, #8 34 addeq \irqnr, \irqnr, #8 37 addeq \irqnr, \irqnr, #8 40 addeq \irqnr, \irqnr, #4 43 addeq \irqnr, \irqnr, #2 45 addeqs \irqnr, \irqnr, #1
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/arch/arm/mach-footbridge/include/mach/ |
D | entry-macro.S | 24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 27 mov \irqnr, #IRQ_SDRAMPARITY 32 movne \irqnr, #IRQ_CONRX 36 movne \irqnr, #IRQ_DMA1 40 movne \irqnr, #IRQ_DMA2 44 movne \irqnr, #IRQ_IN0 48 movne \irqnr, #IRQ_IN1 52 movne \irqnr, #IRQ_IN2 56 movne \irqnr, #IRQ_IN3 60 movne \irqnr, #IRQ_PCI [all …]
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/arch/arm/mach-gemini/include/mach/ |
D | entry-macro.S | 18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 20 ldr \irqnr, [\irqstat] 21 cmp \irqnr, #0 23 mov \tmp, \irqnr 24 mov \irqnr, #0 28 add \irqnr, \irqnr, #1 30 cmp \irqnr, #31
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/arch/arm/mach-ebsa110/include/mach/ |
D | entry-macro.S | 19 .macro get_irqnr_and_base, irqnr, stat, base, tmp 21 mov \irqnr, #0 23 addeq \irqnr, \irqnr, #4 26 addeq \irqnr, \irqnr, #2 29 addeq \irqnr, \irqnr, #1
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/arch/arm/mach-orion5x/include/mach/ |
D | entry-macro.S | 17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 20 mov \irqnr, #0 @ default irqnr 23 clzne \irqnr, \irqstat @ calc irqnr 24 rsbne \irqnr, \irqnr, #32
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/arch/arm/mach-iop13xx/include/mach/ |
D | entry-macro.S | 29 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 30 mrc p6, 0, \irqnr, c3, c2, 0 @ Read IINTVEC 31 cmp \irqnr, #0 32 mrceq p6, 0, \irqnr, c3, c2, 0 @ Re-read on potentially bad zero 33 adds \irqstat, \irqnr, #1 @ Check for 0xffffffff 34 movne \irqnr, \irqnr, lsr #2 @ Convert to irqnr
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/arch/arm/mach-ixp4xx/include/mach/ |
D | entry-macro.S | 15 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 20 clz \irqnr, \irqstat 22 sub \irqnr, \base, \irqnr 33 mov \irqnr, #63 36 subne \irqnr, \irqnr, \irqstat
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/arch/arm/mach-davinci/include/mach/ |
D | entry-macro.S | 18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 28 sub \irqnr, \tmp, #1 32 1001: ldr \irqnr, [\base, #0x80] /* get irq number */ 33 mov \tmp, \irqnr, lsr #31 34 and \irqnr, \irqnr, #0xff /* irq is in bits 0-9 */
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/arch/arm/mach-omap1/ |
D | irq.c | 148 u32 irqnr; in omap1_handle_irq() local 151 irqnr = readl_relaxed(l1 + IRQ_ITR_REG_OFFSET); in omap1_handle_irq() 152 irqnr &= ~(readl_relaxed(l1 + IRQ_MIR_REG_OFFSET) & 0xffffffff); in omap1_handle_irq() 153 if (!irqnr) in omap1_handle_irq() 156 irqnr = readl_relaxed(l1 + IRQ_SIR_FIQ_REG_OFFSET); in omap1_handle_irq() 157 if (irqnr) in omap1_handle_irq() 160 irqnr = readl_relaxed(l1 + IRQ_SIR_IRQ_REG_OFFSET); in omap1_handle_irq() 161 if (irqnr == omap_l2_irq) { in omap1_handle_irq() 162 irqnr = readl_relaxed(l2 + IRQ_SIR_IRQ_REG_OFFSET); in omap1_handle_irq() 163 if (irqnr) in omap1_handle_irq() [all …]
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/arch/arm/mach-mv78xx0/include/mach/ |
D | entry-macro.S | 17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 21 mov \irqnr, #31 28 mov \irqnr, #63 35 mov \irqnr, #95 40 subne \irqnr, \irqnr, \irqstat
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/arch/arm/mach-w90x900/include/mach/ |
D | entry-macro.S | 18 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 22 ldr \irqnr, [\base, #AIC_IPER] 23 ldr \irqnr, [\base, #AIC_ISNR] 24 cmp \irqnr, #0
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/arch/arm/mach-lpc32xx/include/mach/ |
D | entry-macro.S | 32 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 34 clz \irqnr, \irqstat 35 rsb \irqnr, \irqnr, #31
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/arch/arm/mach-dove/include/mach/ |
D | entry-macro.S | 17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 21 mov \irqnr, #32 27 moveq \irqnr, #64 32 subne \irqnr, \irqnr, \irqstat
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/arch/arm/mach-iop32x/include/mach/ |
D | entry-macro.S | 21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 24 clzne \irqnr, \irqstat 25 rsbne \irqnr, \irqnr, #31
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/arch/arm/mach-iop33x/include/mach/ |
D | entry-macro.S | 21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 25 adds \irqnr, \irqstat, #1 26 movne \irqnr, \irqstat, lsr #2
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/arch/arm/include/asm/hardware/ |
D | entry-macro-iomd.S | 14 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 37 2406: ldrneb \irqnr, [\tmp, \irqstat] @ get IRQ number
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/arch/arm/include/asm/ |
D | ecard.h | 112 void (*irqenable)(ecard_t *ec, int irqnr); 113 void (*irqdisable)(ecard_t *ec, int irqnr);
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/arch/unicore32/kernel/ |
D | entry.S | 93 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 99 cntlz \irqnr, \irqstat 100 rsub \irqnr, \irqnr, #31
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/arch/arm/mach-rpc/ |
D | ecard.c | 386 static void ecard_def_irq_enable(ecard_t *ec, int irqnr) in ecard_def_irq_enable() argument 390 static void ecard_def_irq_disable(ecard_t *ec, int irqnr) in ecard_def_irq_disable() argument
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