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Searched refs:itlb_cached_pge (Results 1 – 2 of 2) sorted by relevance

/arch/frv/mm/
Dmmu-context.c33 mm->context.itlb_cached_pge = 0xffffffffUL; in init_new_context()
99 asm volatile("movsg scr0,%0" : "=r"(old->itlb_cached_pge)); in change_mm_context()
113 asm volatile("movgs %0,scr0" : : "r"(ctx->itlb_cached_pge)); in change_mm_context()
/arch/frv/include/asm/
Dmmu.h19 unsigned long itlb_cached_pge; /* [SCR0] PGE cached for insn TLB handler */ member