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Searched refs:local_flush_icache_range (Results 1 – 20 of 20) sorted by relevance

/arch/mips/kvm/
Ddyntrans.c43 local_flush_icache_range(kseg0_opc, kseg0_opc + 32); in kvm_mips_trans_cache_index()
68 local_flush_icache_range(kseg0_opc, kseg0_opc + 32); in kvm_mips_trans_cache_va()
100 local_flush_icache_range(kseg0_opc, kseg0_opc + 32); in kvm_mips_trans_mfc0()
104 local_flush_icache_range((unsigned long)opc, in kvm_mips_trans_mfc0()
135 local_flush_icache_range(kseg0_opc, kseg0_opc + 32); in kvm_mips_trans_mtc0()
139 local_flush_icache_range((unsigned long)opc, in kvm_mips_trans_mtc0()
Demulate.c1610 local_flush_icache_range(CKSEG0ADDR(pa), 32); in kvm_mips_sync_icache()
/arch/xtensa/include/asm/
Dcacheflush.h106 #define flush_icache_range local_flush_icache_range
142 #define flush_icache_range local_flush_icache_range
149 #define local_flush_icache_range(start, end) \ macro
/arch/mips/mm/
Dcache.c34 void (*local_flush_icache_range)(unsigned long start, unsigned long end); variable
35 EXPORT_SYMBOL_GPL(local_flush_icache_range);
Dc-tx39.c368 local_flush_icache_range = (void *) tx39h_flush_icache_all; in tx39_cache_init()
395 local_flush_icache_range = tx39_flush_icache_range; in tx39_cache_init()
Dc-r3k.c327 local_flush_icache_range = r3k_flush_icache_range; in r3k_cache_init()
Dc-octeon.c296 local_flush_icache_range = local_octeon_flush_icache_range; in octeon_cache_init()
Dtlbex.c444 local_flush_icache_range(ebase, ebase + 0x80); in build_r3000_tlb_refill_handler()
1437 local_flush_icache_range(ebase, ebase + 0x100); in build_r4000_tlb_refill_handler()
2240 local_flush_icache_range((unsigned long)handle_tlbl, in flush_tlb_handlers()
2242 local_flush_icache_range((unsigned long)handle_tlbs, in flush_tlb_handlers()
2244 local_flush_icache_range((unsigned long)handle_tlbm, in flush_tlb_handlers()
2246 local_flush_icache_range((unsigned long)tlbmiss_handler_setup_pgd, in flush_tlb_handlers()
Dc-r4k.c1772 local_flush_icache_range = local_r4k_flush_icache_range;
1825 local_flush_icache_range = (void *)b5k_instruction_hazard;
/arch/sh/include/asm/
Dcacheflush.h28 extern void (*local_flush_icache_range)(void *args);
/arch/mips/include/asm/
Dcacheflush.h82 extern void (*local_flush_icache_range)(unsigned long start, unsigned long end);
/arch/sh/mm/
Dcache-sh7705.c187 local_flush_icache_range = sh7705_flush_icache_range; in sh7705_cache_init()
Dcache.c25 void (*local_flush_icache_range)(void *args) = cache_noop; variable
230 cacheop_on_each_cpu(local_flush_icache_range, (void *)&data, 1); in flush_icache_range()
Dcache-sh2a.c184 local_flush_icache_range = sh2a_flush_icache_range; in sh2a_cache_init()
Dcache-sh4.c385 local_flush_icache_range = sh4_flush_icache_range; in sh4_cache_init()
Dcache-sh5.c614 local_flush_icache_range = sh5_flush_icache_range; in sh5_cache_init()
/arch/mips/kernel/
Dsmp-bmips.c370 local_flush_icache_range(0, ~0); in bmips_cpu_disable()
449 local_flush_icache_range(dst, dst + (end - start)); in bmips_wr_vec()
Dtraps.c1926 local_flush_icache_range(ebase + 0x200, (unsigned long)buf); in set_except_vector()
2005 local_flush_icache_range((unsigned long)b, in set_vi_srs_handler()
2027 local_flush_icache_range((unsigned long)b, in set_vi_srs_handler()
2189 local_flush_icache_range(ebase + offset, ebase + offset + size); in set_handler()
2376 local_flush_icache_range(ebase, ebase + 0x400); in trap_init()
Dpm-cps.c617 local_flush_icache_range((unsigned long)buf, (unsigned long)p); in cps_gen_entry_code()
/arch/xtensa/kernel/
Dsmp.c576 local_flush_icache_range(fd->addr1, fd->addr2); in ipi_flush_icache_range()