/arch/powerpc/math-emu/ |
D | math.c | 227 void *op0 = 0, *op1 = 0, *op2 = 0, *op3 = 0; in do_mathemu() local 331 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() 337 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() 343 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() 352 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() 362 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() 367 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() 371 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() 376 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() 382 op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); in do_mathemu() [all …]
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/arch/arm64/include/asm/ |
D | esr.h | 136 #define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \ argument 137 (((op0) << ESR_ELx_SYS64_ISS_OP0_SHIFT) | \
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D | sysreg.h | 37 #define sys_reg(op0, op1, crn, crm, op2) \ argument 38 ((((op0)&3)<<19)|((op1)<<16)|((crn)<<12)|((crm)<<8)|((op2)<<5))
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/arch/arm64/include/uapi/asm/ |
D | kvm.h | 181 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ argument 183 ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \
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/arch/x86/crypto/ |
D | cast6-avx-x86_64-asm_64.S | 116 #define F_head(a, x, gi1, gi2, op0) \ argument 117 op0 a, RKM, x; \ 139 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \ argument 140 F_head(b1, RX, RGI1, RGI2, op0); \ 141 F_head(b2, RX, RGI3, RGI4, op0); \
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D | cast5-avx-x86_64-asm_64.S | 116 #define F_head(a, x, gi1, gi2, op0) \ argument 117 op0 a, RKM, x; \ 139 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \ argument 140 F_head(b1, RX, RGI1, RGI2, op0); \ 141 F_head(b2, RX, RGI3, RGI4, op0); \
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/arch/powerpc/include/asm/ |
D | mpc52xx_psc.h | 205 u8 op0; /* PSC + 0x3c */ member 346 u8 op0; /* PSC + 0x4c */ member
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/arch/m68k/fpsp040/ |
D | bugfix.S | 187 | op0. Else, or if opclass2, check for cu dest equal to 203 beqs op0 |if equal, continue bugfix 210 beqs op0 |if equal, continue bugfix 224 op0: label
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/arch/xtensa/kernel/ |
D | align.S | 216 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble
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