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Searched refs:reg_shift (Results 1 – 11 of 11) sorted by relevance

/arch/powerpc/boot/
Dns16550.c31 static u32 reg_shift; variable
35 out_8(reg_base + (UART_FCR << reg_shift), 0x06); in ns16550_open()
41 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_THRE) == 0); in ns16550_putc()
47 while ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) == 0); in ns16550_getc()
53 return ((in_8(reg_base + (UART_LSR << reg_shift)) & UART_LSR_DR) != 0); in ns16550_tstc()
70 n = getprop(devp, "reg-shift", &reg_shift, sizeof(reg_shift)); in ns16550_console_init()
71 if (n != sizeof(reg_shift)) in ns16550_console_init()
72 reg_shift = 0; in ns16550_console_init()
74 reg_shift = be32_to_cpu(reg_shift); in ns16550_console_init()
Dvirtex.c31 u32 reg_shift, reg_offset, clk, spd; in virtex_ns16550_console_init() local
42 n = getprop(devp, "reg-shift", &reg_shift, sizeof(reg_shift)); in virtex_ns16550_console_init()
43 if (n != sizeof(reg_shift)) in virtex_ns16550_console_init()
44 reg_shift = 0; in virtex_ns16550_console_init()
58 out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB); in virtex_ns16550_console_init()
61 out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF); in virtex_ns16550_console_init()
62 out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8); in virtex_ns16550_console_init()
65 out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8); in virtex_ns16550_console_init()
68 out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR); in virtex_ns16550_console_init()
71 out_8(reg_base + (UART_FCR << reg_shift), in virtex_ns16550_console_init()
/arch/mips/include/asm/
Dsetup.h10 unsigned int reg_shift, unsigned int timeout);
13 unsigned int reg_shift, unsigned int timeout) {} in setup_8250_early_printk_port() argument
/arch/mips/kernel/
Dearly_printk_8250.c28 void setup_8250_early_printk_port(unsigned long base, unsigned int reg_shift, in setup_8250_early_printk_port() argument
32 serial8250_reg_shift = reg_shift; in setup_8250_early_printk_port()
/arch/mips/bcm47xx/
Dserial.c43 p->regshift = ssb_port->reg_shift; in uart8250_init_ssb()
69 p->regshift = bcma_port->reg_shift; in uart8250_init_bcma()
/arch/arm/mach-omap2/
Dprm2xxx.c66 while (p->reg_shift >= 0 && p->std_shift >= 0) { in omap2xxx_prm_read_reset_sources()
67 if (v & (1 << p->reg_shift)) in omap2xxx_prm_read_reset_sources()
Dprm.h125 s8 reg_shift; member
Dprm3xxx.c455 while (p->reg_shift >= 0 && p->std_shift >= 0) { in omap3xxx_prm_read_reset_sources()
456 if (v & (1 << p->reg_shift)) in omap3xxx_prm_read_reset_sources()
Dprm44xx.c381 while (p->reg_shift >= 0 && p->std_shift >= 0) { in omap44xx_prm_read_reset_sources()
382 if (v & (1 << p->reg_shift)) in omap44xx_prm_read_reset_sources()
/arch/mips/sni/
Da20r.c124 .reg_shift = 2,
/arch/arm/mach-pxa/
Dvpac270.c593 .reg_shift = 1,