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Searched refs:rn (Results 1 – 25 of 29) sorted by relevance

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/arch/arm/net/
Dbpf_jit_32.h135 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm)) argument
137 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm)) argument
139 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm) argument
140 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm) argument
142 #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, rm) argument
143 #define ARM_AND_I(rd, rn, imm) _AL3_I(ARM_INST_AND, rd, rn, imm) argument
145 #define ARM_BIC_R(rd, rn, rm) _AL3_R(ARM_INST_BIC, rd, rn, rm) argument
146 #define ARM_BIC_I(rd, rn, imm) _AL3_I(ARM_INST_BIC, rd, rn, imm) argument
152 #define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm) argument
153 #define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm) argument
[all …]
/arch/powerpc/include/asm/
Ddcr-native.h64 #define mfdcr(rn) \ argument
66 if (__builtin_constant_p(rn) && rn < 1024) \
68 : "n" (rn)); \
70 rval = mfdcrx(rn); \
72 rval = __mfdcr(rn); \
75 #define mtdcr(rn, v) \ argument
77 if (__builtin_constant_p(rn) && rn < 1024) \
79 : : "n" (rn), "r" (v)); \
81 mtdcrx(rn, v); \
83 __mtdcr(rn, v); \
Dreg_fsl_emb.h11 #define mfpmr(rn) ({unsigned int rval; \ argument
12 asm volatile("mfpmr %0," __stringify(rn) \
14 #define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v)) argument
Dreg_booke.h762 #define mftmr(rn) ({unsigned long rval; \ argument
763 asm volatile(MFTMR(rn, %0) : "=r" (rval)); rval;})
764 #define mttmr(rn, v) asm volatile(MTTMR(rn, %0) : \ argument
Dreg.h1204 #define mfspr(rn) ({unsigned long rval; \ argument
1205 asm volatile("mfspr %0," __stringify(rn) \
1207 #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : \ argument
/arch/arm/probes/kprobes/
Dactions-arm.c82 int rn = (insn >> 16) & 0xf; in emulate_ldrdstrd() local
87 register unsigned long rnv asm("r2") = (rn == 15) ? pc in emulate_ldrdstrd()
88 : regs->uregs[rn]; in emulate_ldrdstrd()
102 regs->uregs[rn] = rnv; in emulate_ldrdstrd()
111 int rn = (insn >> 16) & 0xf; in emulate_ldr() local
115 register unsigned long rnv asm("r2") = (rn == 15) ? pc in emulate_ldr()
116 : regs->uregs[rn]; in emulate_ldr()
132 regs->uregs[rn] = rnv; in emulate_ldr()
142 int rn = (insn >> 16) & 0xf; in emulate_str() local
147 register unsigned long rnv asm("r2") = (rn == 15) ? rnpc in emulate_str()
[all …]
Dactions-common.c25 int rn = (insn >> 16) & 0xf; in simulate_ldm1stm1() local
30 long *addr = (long *)regs->uregs[rn]; in simulate_ldm1stm1()
59 regs->uregs[rn] = (long)addr; in simulate_ldm1stm1()
134 int rn = (insn >> 16) & 0xf; in kprobe_decode_ldmstm() local
136 if (rn <= 12 && (reglist & 0xe000) == 0) { in kprobe_decode_ldmstm()
140 } else if (rn >= 2 && (reglist & 0x8003) == 0) { in kprobe_decode_ldmstm()
142 rn -= 2; in kprobe_decode_ldmstm()
146 } else if (rn >= 3 && (reglist & 0x0007) == 0) { in kprobe_decode_ldmstm()
149 rn -= 3; in kprobe_decode_ldmstm()
158 (rn << 16) | reglist); in kprobe_decode_ldmstm()
Dactions-thumb.c31 int rn = (insn >> 16) & 0xf; in t32_simulate_table_branch() local
34 unsigned long rnv = (rn == 15) ? pc : regs->uregs[rn]; in t32_simulate_table_branch()
167 int rn = (insn >> 16) & 0xf; in t32_emulate_ldrdstrd() local
171 register unsigned long rnv asm("r2") = (rn == 15) ? pc in t32_emulate_ldrdstrd()
172 : regs->uregs[rn]; in t32_emulate_ldrdstrd()
181 if (rn != 15) in t32_emulate_ldrdstrd()
182 regs->uregs[rn] = rnv; /* Writeback base register */ in t32_emulate_ldrdstrd()
192 int rn = (insn >> 16) & 0xf; in t32_emulate_ldrstr() local
196 register unsigned long rnv asm("r2") = regs->uregs[rn]; in t32_emulate_ldrstr()
206 regs->uregs[rn] = rnv; /* Writeback base register */ in t32_emulate_ldrstr()
[all …]
Dcheckers-arm.c130 unsigned int rn = (insn >> 16) & 0xf; in arm_check_regs_ldmstm() local
131 asi->register_usage_flags = reglist | (1 << rn); in arm_check_regs_ldmstm()
/arch/powerpc/boot/
Dreg.h22 #define mfspr(rn) ({unsigned long rval; \ argument
23 asm volatile("mfspr %0," __stringify(rn) \
25 #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) argument
Ddcr.h4 #define mfdcr(rn) \ argument
7 asm volatile("mfdcr %0,%1" : "=r"(rval) : "i"(rn)); \
10 #define mtdcr(rn, val) \ argument
11 asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
12 #define mfdcrx(rn) \ argument
15 asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
18 #define mtdcrx(rn, val) \ argument
20 asm volatile("mtdcrx %0,%1" : : "r"(rn), "r" (val)); \
/arch/unicore32/mm/
Dproc-macros.S41 .macro vma_vm_mm, rd, rn argument
42 ldw \rd, [\rn+], #VMA_VM_MM
48 .macro vma_vm_flags, rd, rn argument
49 ldw \rd, [\rn+], #VMA_VM_FLAGS
52 .macro tsk_mm, rd, rn argument
53 ldw \rd, [\rn+], #TI_TASK
70 .macro mmid, rd, rn argument
71 ldw \rd, [\rn+], #MM_CONTEXT_ID
77 .macro asid, rd, rn argument
78 and \rd, \rn, #255
Dalignment.c291 unsigned int rd, rn, pc_correction, reg_correction, nr_regs, regbits; in do_alignment_ldmstm() local
302 rn = RN_BITS(instr); in do_alignment_ldmstm()
303 newaddr = eaddr = regs->uregs[rn]; in do_alignment_ldmstm()
343 regs->uregs[rn] = newaddr; in do_alignment_ldmstm()
/arch/arm/mm/
Dproc-macros.S14 .macro vma_vm_mm, rd, rn argument
15 ldr \rd, [\rn, #VMA_VM_MM]
21 .macro vma_vm_flags, rd, rn argument
22 ldr \rd, [\rn, #VMA_VM_FLAGS]
25 .macro tsk_mm, rd, rn argument
26 ldr \rd, [\rn, #TI_TASK]
44 .macro mmid, rd, rn argument
46 ldr \rd, [\rn, #MM_CONTEXT_ID + 4 ]
48 ldr \rd, [\rn, #MM_CONTEXT_ID]
55 .macro asid, rd, rn argument
[all …]
Dabort-lv4t.S36 /* 0 */ b .data_arm_lateldrhpost @ ldrh rd, [rn], #m/rm
37 /* 1 */ b .data_arm_lateldrhpre @ ldrh rd, [rn, #m/rm]
40 /* 4 */ b .data_arm_lateldrpostconst @ ldr rd, [rn], #m
41 /* 5 */ b .data_arm_lateldrpreconst @ ldr rd, [rn, #m]
42 /* 6 */ b .data_arm_lateldrpostreg @ ldr rd, [rn], rm
43 /* 7 */ b .data_arm_lateldrprereg @ ldr rd, [rn, rm]
44 /* 8 */ b .data_arm_ldmstm @ ldm*a rn, <rlist>
45 /* 9 */ b .data_arm_ldmstm @ ldm*b rn, <rlist>
48 /* c */ b do_DataAbort @ ldc rd, [rn], #m @ Same as ldr rd, [rn], #m
49 /* d */ b do_DataAbort @ ldc rd, [rn, #m]
Dalignment.c505 unsigned int rd, rn, correction, nr_regs, regbits; in do_alignment_ldmstm() local
519 rn = RN_BITS(instr); in do_alignment_ldmstm()
520 newaddr = eaddr = regs->uregs[rn]; in do_alignment_ldmstm()
580 regs->uregs[rn] = newaddr; in do_alignment_ldmstm()
/arch/sh/kernel/
Dtraps_32.c90 unsigned long *rm, *rn; in handle_unaligned_ins() local
95 rn = &regs->regs[index]; in handle_unaligned_ins()
116 dst = (unsigned char *)rn; in handle_unaligned_ins()
132 dstu = (unsigned char __user *)*rn; in handle_unaligned_ins()
143 dstu = (unsigned char __user *)*rn; in handle_unaligned_ins()
153 *rn -= count; in handle_unaligned_ins()
155 dstu = (unsigned char __user *)*rn; in handle_unaligned_ins()
167 dst = (unsigned char *)rn; in handle_unaligned_ins()
179 dst = (unsigned char*) rn; in handle_unaligned_ins()
227 dst = (unsigned char *)rn; in handle_unaligned_ins()
[all …]
Ddisassemble.c302 int rn = 0; in print_sh_insn() local
362 rn = nibs[n]; in print_sh_insn()
368 rn = (nibs[n] & 0xc) >> 2; in print_sh_insn()
394 printk("r%d", rn); in print_sh_insn()
397 printk("@r%d+", rn); in print_sh_insn()
400 printk("@-r%d", rn); in print_sh_insn()
403 printk("@r%d", rn); in print_sh_insn()
406 printk("@(%d,r%d)", imm, rn); in print_sh_insn()
433 printk("@(r0,r%d)", rn); in print_sh_insn()
482 printk("fr%d", rn); in print_sh_insn()
[all …]
/arch/arm/mach-tegra/
Dsleep.h54 .macro wait_until, rn, base, tmp
55 add \rn, \rn, #1
57 cmp \tmp, \rn
/arch/powerpc/lib/
Dsstep.c38 extern int do_lfs(int rn, unsigned long ea);
39 extern int do_lfd(int rn, unsigned long ea);
40 extern int do_stfs(int rn, unsigned long ea);
41 extern int do_stfd(int rn, unsigned long ea);
42 extern int do_lvx(int rn, unsigned long ea);
43 extern int do_stvx(int rn, unsigned long ea);
44 extern int do_lxvd2x(int rn, unsigned long ea);
45 extern int do_stxvd2x(int rn, unsigned long ea);
342 static int __kprobes do_fp_load(int rn, int (*func)(int, unsigned long), in do_fp_load() argument
366 return (*func)(rn, ea); in do_fp_load()
[all …]
/arch/arm/probes/uprobes/
Dactions-arm.c169 int rn = (insn >> 16) & 0xf; in uprobe_decode_ldmstm() local
171 unsigned used = reglist | (1 << rn); in uprobe_decode_ldmstm()
173 if (rn == 15) in uprobe_decode_ldmstm()
/arch/arm64/kernel/
Dentry-ftrace.S58 .macro mcount_adjust_addr rd, rn argument
59 sub \rd, \rn, #AARCH64_INSN_SIZE
Darmv8_deprecated.c377 int rn, rt2, res = 0; in swp_handler() local
396 rn = aarch32_insn_extract_reg_num(instr, A32_RN_OFFSET); in swp_handler()
399 address = (u32)regs->user_regs.regs[rn]; in swp_handler()
404 rn, address, destreg, in swp_handler()
/arch/arm64/include/asm/
Dassembler.h269 .macro vma_vm_mm, rd, rn
270 ldr \rd, [\rn, #VMA_VM_MM]
276 .macro mmid, rd, rn
277 ldr \rd, [\rn, #MM_CONTEXT_ID]
/arch/arm/kernel/
Dentry-ftrace.S60 .macro mcount_adjust_addr rd, rn argument
61 bic \rd, \rn, #1 @ clear the Thumb bit if present

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