Searched refs:rt_sysc_r32 (Results 1 – 8 of 8) sorted by relevance
41 static inline u32 rt_sysc_r32(unsigned reg) in rt_sysc_r32() function48 u32 val = rt_sysc_r32(reg) & ~clr; in rt_sysc_m32()
131 return rt_sysc_r32(SYSC_REG_CHIP_REV) & CHIP_REV_ECO_MASK; in mt7620_get_eco()
317 rstctrl = rt_sysc_r32(RT3883_SYSC_REG_RSTCTRL); in rt3883_pci_preinit()318 syscfg1 = rt_sysc_r32(RT3883_SYSC_REG_SYSCFG1); in rt3883_pci_preinit()319 clkcfg1 = rt_sysc_r32(RT3883_SYSC_REG_CLKCFG1); in rt3883_pci_preinit()330 t = rt_sysc_r32(RT3883_SYSC_REG_PCIE_CLK_GEN0); in rt3883_pci_preinit()334 t = rt_sysc_r32(RT3883_SYSC_REG_PCIE_CLK_GEN1); in rt3883_pci_preinit()338 t = rt_sysc_r32(RT3883_SYSC_REG_PCIE_CLK_GEN1); in rt3883_pci_preinit()342 t = rt_sysc_r32(RT3883_SYSC_REG_PCIE_CLK_GEN0); in rt3883_pci_preinit()392 t = rt_sysc_r32(RT3883_SYSC_REG_RSTCTRL); in rt3883_pci_preinit()399 t = rt_sysc_r32(RT3883_SYSC_REG_CLKCFG1); in rt3883_pci_preinit()403 t = rt_sysc_r32(RT3883_SYSC_REG_PCIE_CLK_GEN0); in rt3883_pci_preinit()
35 val = rt_sysc_r32(SYSC_REG_RESET_CTRL); in ralink_assert_device()50 val = rt_sysc_r32(SYSC_REG_RESET_CTRL); in ralink_deassert_device()
284 reg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0); in mt7620_get_xtal_rate()296 reg = rt_sysc_r32(SYSC_REG_CLKCFG0); in mt7620_get_periph_rate()312 reg = rt_sysc_r32(SYSC_REG_CPLL_CONFIG0); in mt7620_get_cpu_pll_rate()338 reg = rt_sysc_r32(SYSC_REG_CPLL_CONFIG1); in mt7620_get_pll_rate()355 reg = rt_sysc_r32(SYSC_REG_CPU_SYS_CLKCFG); in mt7620_get_cpu_rate()388 reg = rt_sysc_r32(SYSC_REG_CPU_SYS_CLKCFG); in mt7620_get_sys_rate()468 u32 val = rt_sysc_r32(SYSC_REG_CPU_SYS_CLKCFG); in ralink_clk_init()
131 u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG); in ralink_clk_init()184 u32 val = rt_sysc_r32(RT3352_SYSC_REG_SYSCFG0); in ralink_clk_init()
46 u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG); in ralink_clk_init()
73 syscfg0 = rt_sysc_r32(RT3883_SYSC_REG_SYSCFG0); in ralink_clk_init()