| /arch/mips/kernel/ |
| D | relocate_kernel.S | 36 and s3, s2, 0x1
37 beq s3, zero, 1f
43 and s3, s2, 0x2
44 beq s3, zero, 1f
50 and s3, s2, 0x4
51 beq s3, zero, 1f
55 and s3, s2, 0x8
56 beq s3, zero, process_entry
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| D | cps-vec-ns16550.S | 79 move s3, ra
84 move ra, s3
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| /arch/m68k/include/asm/ |
| D | uaccess_mm.h | 205 #define __constant_copy_from_user_asm(res, to, from, tmp, n, s1, s2, s3)\ argument
211 " .ifnc \""#s3"\",\"\"\n" \
212 "3: "MOVES"."#s3" (%2)+,%3\n" \
213 " move."#s3" %3,(%1)+\n" \
220 " .ifnc \""#s3"\",\"\"\n" \
229 " .ifnc \""#s3"\",\"\"\n" \
230 "30: clr."#s3" (%1)+\n" \
285 #define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \ argument
292 " .ifnc \""#s3"\",\"\"\n" \
293 " move."#s3" (%2)+,%3\n" \
[all …]
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| /arch/ia64/lib/ |
| D | xor.S | 78 .rotr s1[6+1], s2[6+1], s3[6+1], d[2]
85 (p[0]) ld8.nta s3[0] = [r18], 8
87 (p[6]) xor d[0] = d[0], s3[6]
119 .rotr s1[6+1], s2[6+1], s3[6+1], s4[6+1], d[2]
125 (p[0]) ld8.nta s3[0] = [r18], 8
127 (p[6]) xor r20 = s3[6], s4[6]
163 .rotr s1[6+1], s2[6+1], s3[6+1], s4[6+1], s5[6+1], d[2]
169 (p[0]) ld8.nta s3[0] = [r18], 8
171 (p[6]) xor r21 = s3[6], s4[6]
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| /arch/mips/include/asm/ |
| D | regdef.h | 45 #define s3 $19 macro
88 #define s3 $19 macro
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| D | asmmacro-64.h | 20 LONG_S s3, THREAD_REG19(\thread)
33 LONG_L s3, THREAD_REG19(\thread)
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| D | asmmacro-32.h | 67 LONG_S s3, THREAD_REG19(\thread)
80 LONG_L s3, THREAD_REG19(\thread)
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| /arch/x86/crypto/ |
| D | twofish-x86_64-asm_64.S | 36 #define s3 3072 /* S3 Array */ macro
89 xor s3(%r11,%rdi,4),%r9d;\
91 xor s3(%r11,%rdi,4),%r8d;\
127 xor s3(%r11,%rdi,4),%r9d;\
129 xor s3(%r11,%rdi,4),%r8d;\
156 mov s3(%r11,%rdi,4),%r8d;\
169 xor s3(%r11,%rdi,4),%r9d;\
192 mov s3(%r11,%rdi,4),%r8d;\
209 xor s3(%r11,%rdi,4),%r9d;\
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| D | twofish-i586-asm_32.S | 42 #define s3 3072 /* S3 Array */ macro
91 xor s3(%ebp,%edi,4),%esi;\
93 xor s3(%ebp,%edi,4),d ## D;\
129 xor s3(%ebp,%edi,4),%esi;\
131 xor s3(%ebp,%edi,4),d ## D;\
160 mov s3(%ebp,%edi,4),%esi;\
173 xor s3(%ebp,%edi,4),c ## D;\
198 mov s3(%ebp,%edi,4),%esi;\
211 xor s3(%ebp,%edi,4),c ## D;\
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| D | poly1305-sse2-x86_64.S | 34 #define s3 0x08(%rsp) macro
74 mov %eax,s3
117 # t1[0] = h0 * r0 + h2 * s3
123 movd s3,t2
129 # t2[1] = h1 * r0 + h3 * s3
135 movd s3,t4
178 # t3[0] = h4 * s3
180 movd s3,t3
339 # combine r3,u3 and s3=r3*5,v3=u3*5
403 # t1 += [ hc2[1] * s3, hc2[0] * v3 ]
[all …]
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| D | twofish-x86_64-asm_64-3way.S | 32 #define s3 3072 macro
159 g1g2_3(ab, cd, s0, s1, s2, s3, s0, s1, s2, s3, RX, RY); \
166 g1g2_3(ba, dc, s1, s2, s3, s0, s3, s0, s1, s2, RY, RX); \
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| D | blowfish-x86_64-asm_64.S | 33 #define s3 ((16 + 2 + (3 * 256)) * 4) macro
85 addl s3(CTX,RT2,4), RT0d; \
206 addl s3(CTX,RT3,4), RT0d; \
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| D | twofish-avx-x86_64-asm_64.S | 45 #define s3 3072 macro
136 G(RGI1, RGI2, x1, s0, s1, s2, s3); \
142 G(RGI3, RGI4, y1, s1, s2, s3, s0); \
148 G(RGI1, RGI2, x2, s0, s1, s2, s3); \
152 G(RGI3, RGI4, y2, s1, s2, s3, s0); \
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| /arch/mips/boot/compressed/ |
| D | head.S | 26 move s3, a3
62 move a3, s3
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| /arch/mips/power/ |
| D | hibernate_asm.S | 24 PTR_S s3, PT_R19(t0)
54 PTR_L s3, PT_R19(t0)
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| /arch/x86/include/asm/uv/ |
| D | uv_mmrs.h | 743 } s3; member
844 } s3; member
919 } s3; member
1185 } s3; member
1286 } s3; member
1361 } s3; member
1920 } s3; member
2139 } s3; member
2344 } s3; member
2438 } s3; member
[all …]
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| /arch/alpha/include/uapi/asm/ |
| D | regdef.h | 18 #define s3 $12 macro
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| /arch/arm/crypto/ |
| D | sha2-ce-core.S | 46 .macro add_update, ev, s0, s1, s2, s3 argument
49 sha256su1.32 q\s0, q\s2, q\s3
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| D | sha1-ce-core.S | 50 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
53 sha1su1.32 q\s0, q\s3
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| D | aes-armv4.S | 295 ldr r7,[r10,r7,lsl#2] @ Te3[s3>>0]
297 ldr r8,[r10,r8,lsl#2] @ Te2[s3>>8]
300 ldr r9,[r10,r9,lsl#2] @ Te1[s3>>16]
304 ldr r3,[r10,r3,lsl#2] @ Te0[s3>>24]
357 ldrb r7,[r10,r7,lsl#2] @ Te4[s3>>0]
359 ldrb r8,[r10,r8,lsl#2] @ Te4[s3>>8]
362 ldrb r9,[r10,r9,lsl#2] @ Te4[s3>>16]
365 ldrb r3,[r10,r3,lsl#2] @ Te4[s3>>24]
990 ldr r7,[r10,r7,lsl#2] @ Td1[s3>>16]
992 ldr r8,[r10,r8,lsl#2] @ Td2[s3>>8]
[all …]
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| /arch/cris/arch-v32/mm/ |
| D | mmu.S | 49 move $s3, $r10 ; rw_mm_cause
107 move $s3, $r0 ; Get rw_mm_cause
123 move $s3, $r0 ; rw_mm_cause
148 move $s3, $r0 ; Get rw_mm_cause
189 move $s3, $r10 ; rw_mm_cause
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| /arch/mips/fw/lib/ |
| D | call_o32.S | 57 REG_S s3,O32_FRAMESZ-8*SZREG(sp)
97 REG_L s3,O32_FRAMESZ-8*SZREG(sp)
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| /arch/x86/kernel/apic/ |
| D | x2apic_uv_x.c | 469 return m_gr_config.s3.m_skt; in get_n_lshift()
553 if (is_uv3_hub() && gru.s3.mode) { in map_gru_high()
609 id, overlay.v, overlay.s3.base, overlay.s3.m_io); in map_mmioh_high_uv3()
610 if (!overlay.s3.enable) { in map_mmioh_high_uv3()
616 base = (unsigned long)overlay.s3.base; in map_mmioh_high_uv3()
617 m_io = overlay.s3.m_io; in map_mmioh_high_uv3()
628 nasid = redirect.s3.nasid; in map_mmioh_high_uv3()
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| /arch/arm64/crypto/ |
| D | sha2-ce-core.S | 47 .macro add_update, ev, rc, s0, s1, s2, s3 argument
50 sha256su1 v\s0\().4s, v\s2\().4s, v\s3\().4s
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| D | sha1-ce-core.S | 55 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
58 sha1su1 v\s0\().4s, v\s3\().4s
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