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Searched refs:sgl (Results 1 – 23 of 23) sorted by relevance

/arch/tile/include/asm/
Dhv_driver.h42 HV_SGL sgl[/* sgl_len */], __hv64 offset, in tile_hv_dev_preada()
45 return hv_dev_preada(devhdl, flags, sgl_len, sgl, in tile_hv_dev_preada()
52 HV_SGL sgl[/* sgl_len */], __hv64 offset, in tile_hv_dev_pwritea()
55 return hv_dev_pwritea(devhdl, flags, sgl_len, sgl, in tile_hv_dev_pwritea()
/arch/arm64/mm/
Ddma-mapping.c226 static int __swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl, in __swiotlb_map_sg_attrs() argument
233 ret = swiotlb_map_sg_attrs(dev, sgl, nelems, dir, attrs); in __swiotlb_map_sg_attrs()
235 for_each_sg(sgl, sg, ret, i) in __swiotlb_map_sg_attrs()
243 struct scatterlist *sgl, int nelems, in __swiotlb_unmap_sg_attrs() argument
251 for_each_sg(sgl, sg, nelems, i) in __swiotlb_unmap_sg_attrs()
254 swiotlb_unmap_sg_attrs(dev, sgl, nelems, dir, attrs); in __swiotlb_unmap_sg_attrs()
276 struct scatterlist *sgl, int nelems, in __swiotlb_sync_sg_for_cpu() argument
283 for_each_sg(sgl, sg, nelems, i) in __swiotlb_sync_sg_for_cpu()
286 swiotlb_sync_sg_for_cpu(dev, sgl, nelems, dir); in __swiotlb_sync_sg_for_cpu()
290 struct scatterlist *sgl, int nelems, in __swiotlb_sync_sg_for_device() argument
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/arch/microblaze/kernel/
Ddma.c54 static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, in dma_direct_map_sg() argument
62 for_each_sg(sgl, sg, nents, i) { in dma_direct_map_sg()
131 struct scatterlist *sgl, int nents, in dma_direct_sync_sg_for_cpu() argument
139 for_each_sg(sgl, sg, nents, i) in dma_direct_sync_sg_for_cpu()
145 struct scatterlist *sgl, int nents, in dma_direct_sync_sg_for_device() argument
153 for_each_sg(sgl, sg, nents, i) in dma_direct_sync_sg_for_device()
/arch/h8300/kernel/
Ddma.c49 static int map_sg(struct device *dev, struct scatterlist *sgl, in map_sg() argument
56 for_each_sg(sgl, sg, nents, i) { in map_sg()
/arch/sparc/kernel/
Dioport.c549 static int pci32_map_sg(struct device *device, struct scatterlist *sgl, in pci32_map_sg() argument
557 for_each_sg(sgl, sg, nents, n) { in pci32_map_sg()
568 static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl, in pci32_unmap_sg() argument
576 for_each_sg(sgl, sg, nents, n) { in pci32_unmap_sg()
614 static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, in pci32_sync_sg_for_cpu() argument
621 for_each_sg(sgl, sg, nents, n) { in pci32_sync_sg_for_cpu()
627 static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl, in pci32_sync_sg_for_device() argument
634 for_each_sg(sgl, sg, nents, n) { in pci32_sync_sg_for_device()
/arch/ia64/sn/pci/
Dpci_dma.c241 static void sn_dma_unmap_sg(struct device *dev, struct scatterlist *sgl, in sn_dma_unmap_sg() argument
252 for_each_sg(sgl, sg, nhwentries, i) { in sn_dma_unmap_sg()
274 static int sn_dma_map_sg(struct device *dev, struct scatterlist *sgl, in sn_dma_map_sg() argument
279 struct scatterlist *saved_sg = sgl, *sg; in sn_dma_map_sg()
292 for_each_sg(sgl, sg, nhwentries, i) { in sn_dma_map_sg()
/arch/powerpc/kernel/
Ddma.c196 static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, in dma_direct_map_sg() argument
203 for_each_sg(sgl, sg, nents, i) { in dma_direct_map_sg()
252 struct scatterlist *sgl, int nents, in dma_direct_sync_sg() argument
258 for_each_sg(sgl, sg, nents, i) in dma_direct_sync_sg()
Dvio.c559 struct scatterlist *sgl; in vio_dma_iommu_map_sg() local
564 for_each_sg(sglist, sgl, nelems, count) in vio_dma_iommu_map_sg()
565 alloc_size += roundup(sgl->length, IOMMU_PAGE_SIZE(tbl)); in vio_dma_iommu_map_sg()
580 for_each_sg(sglist, sgl, ret, count) in vio_dma_iommu_map_sg()
581 alloc_size -= roundup(sgl->dma_length, IOMMU_PAGE_SIZE(tbl)); in vio_dma_iommu_map_sg()
595 struct scatterlist *sgl; in vio_dma_iommu_unmap_sg() local
600 for_each_sg(sglist, sgl, nelems, count) in vio_dma_iommu_unmap_sg()
601 alloc_size += roundup(sgl->dma_length, IOMMU_PAGE_SIZE(tbl)); in vio_dma_iommu_unmap_sg()
Dibmebus.c106 struct scatterlist *sgl, in ibmebus_map_sg() argument
113 for_each_sg(sgl, sg, nents, i) { in ibmebus_map_sg()
/arch/alpha/kernel/
Dpci-noop.c141 static int alpha_noop_map_sg(struct device *dev, struct scatterlist *sgl, int nents, in alpha_noop_map_sg() argument
147 for_each_sg(sgl, sg, nents, i) { in alpha_noop_map_sg()
/arch/m68k/fpsp040/
Dx_unfl.S144 | ;1=sgl, 2=dbl
224 | ;If destination format is sgl/dbl,
Dround.S26 | sgl = $0001xxxx
148 bfextu LOCAL_HI(%a0){#24:#2},%d3 |sgl prec. g-r are 2 bits right
149 movel #30,%d2 |of the sgl prec. limits
179 .set ad_1_sgl,0x00000100 | constant to add 1 to l-bit in sgl prec
204 andil #0xffffff00,LOCAL_HI(%a0) |truncate bits beyond sgl limit
Dutil.S235 bra end_ovfr |inf is same for all precisions (ext,dbl,sgl)
393 | 10 1 sgl
477 | ;smallest +sgl denorm
Dx_store.S88 | ;ext=00, sgl=01, dbl=10
Dbugfix.S191 | Check for opclass 0. If not, go and check for opclass 2 and sgl.
353 cmpiw #0x4400,%d0 |test for opclass 2 and size=sgl
Dres_func.S1563 | 46ffff00 in sgl prec = 400d0000ffff000000000000 in ext prec
1571 | c7000080 in sgl prec = c00e00008000800000000000 in ext prec
1587 | 42fe0000 in sgl prec = 40050000fe00000000000000 in ext prec
1590 | c3000000 in sgl prec = c00600008000000000000000 in ext prec
/arch/tile/include/hv/
Dhypervisor.h1900 HV_SGL sgl[/* sgl_len */], __hv64 offset, HV_IntArg intarg);
1946 HV_SGL sgl[/* sgl_len */], __hv64 offset, HV_IntArg intarg);
/arch/powerpc/platforms/ps3/
Dsystem-bus.c642 static int ps3_sb_map_sg(struct device *_dev, struct scatterlist *sgl, in ps3_sb_map_sg() argument
653 for_each_sg(sgl, sg, nents, i) { in ps3_sb_map_sg()
/arch/powerpc/boot/dts/
Dwarp.dts143 compatible = "pika,fpga-sgl";
/arch/m68k/ifpsp060/src/
Dfpsp.S1400 bsr.l funimp_skew # skew sgl or dbl inputs
1433 cmpi.b %d0,&0x11 # is class = 2 & fmt = sgl?
1977 # "non-skewed" operand for cases of sgl and dbl src INFs,NANs, and DENORMs.
2304 cmpi.b %d0,&0x1 # was src sgl?
3197 short tbl_operr - tbl_operr # sgl prec shouldn't happen
3329 # denorm operand in the sgl or dbl format. NANs also become skewed and must be
3367 short fsnan_out_s - tbl_snan # sgl prec shouldn't happen
3792 # in the sgl or dbl format.
5309 # here, the operation may underflow iff the precision is sgl or dbl.
11546 # norms/denorms into ext/sgl/dbl precision. #
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Dfplsp.S395 set SGL_LO, 0x3f81 # min sgl prec exponent
396 set SGL_HI, 0x407e # max sgl prec exponent
496 set sgl_thresh, 0x3f81 # minimum sgl exponent
574 fmov.s 0x8(%a6),%fp0 # load sgl input
751 fmov.s 0x8(%a6),%fp0 # load sgl input
928 fmov.s 0x8(%a6),%fp0 # load sgl input
1105 fmov.s 0x8(%a6),%fp0 # load sgl input
1282 fmov.s 0x8(%a6),%fp0 # load sgl input
1459 fmov.s 0x8(%a6),%fp0 # load sgl input
1636 fmov.s 0x8(%a6),%fp0 # load sgl input
[all …]
Dpfpsp.S1399 bsr.l funimp_skew # skew sgl or dbl inputs
1432 cmpi.b %d0,&0x11 # is class = 2 & fmt = sgl?
1976 # "non-skewed" operand for cases of sgl and dbl src INFs,NANs, and DENORMs.
2303 cmpi.b %d0,&0x1 # was src sgl?
3196 short tbl_operr - tbl_operr # sgl prec shouldn't happen
3328 # denorm operand in the sgl or dbl format. NANs also become skewed and must be
3366 short fsnan_out_s - tbl_snan # sgl prec shouldn't happen
3791 # in the sgl or dbl format.
/arch/arm/mm/
Ddma-mapping.c806 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0); in arm_dma_get_sgtable()