| /arch/mn10300/include/asm/ |
| D | cacheflush.h | 24 extern void mn10300_local_icache_inv_page(unsigned long start);
25 extern void mn10300_local_icache_inv_range(unsigned long start, unsigned long end);
26 extern void mn10300_local_icache_inv_range2(unsigned long start, unsigned long size);
28 extern void mn10300_local_dcache_inv_page(unsigned long start);
29 extern void mn10300_local_dcache_inv_range(unsigned long start, unsigned long end);
30 extern void mn10300_local_dcache_inv_range2(unsigned long start, unsigned long size);
32 extern void mn10300_icache_inv_page(unsigned long start);
33 extern void mn10300_icache_inv_range(unsigned long start, unsigned long end);
34 extern void mn10300_icache_inv_range2(unsigned long start, unsigned long size);
36 extern void mn10300_dcache_inv_page(unsigned long start);
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| /arch/mn10300/mm/ |
| D | cache-smp-flush.c | 37 void mn10300_dcache_flush_page(unsigned long start) in mn10300_dcache_flush_page() argument
41 start &= ~(PAGE_SIZE-1); in mn10300_dcache_flush_page()
44 mn10300_local_dcache_flush_page(start); in mn10300_dcache_flush_page()
45 smp_cache_call(SMP_DCACHE_FLUSH_RANGE, start, start + PAGE_SIZE); in mn10300_dcache_flush_page()
57 void mn10300_dcache_flush_range(unsigned long start, unsigned long end) in mn10300_dcache_flush_range() argument
62 mn10300_local_dcache_flush_range(start, end); in mn10300_dcache_flush_range()
63 smp_cache_call(SMP_DCACHE_FLUSH_RANGE, start, end); in mn10300_dcache_flush_range()
75 void mn10300_dcache_flush_range2(unsigned long start, unsigned long size) in mn10300_dcache_flush_range2() argument
80 mn10300_local_dcache_flush_range2(start, size); in mn10300_dcache_flush_range2()
81 smp_cache_call(SMP_DCACHE_FLUSH_RANGE, start, start + size); in mn10300_dcache_flush_range2()
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| D | cache-smp-inv.c | 37 void mn10300_icache_inv_page(unsigned long start) in mn10300_icache_inv_page() argument
41 start &= ~(PAGE_SIZE-1); in mn10300_icache_inv_page()
44 mn10300_local_icache_inv_page(start); in mn10300_icache_inv_page()
45 smp_cache_call(SMP_ICACHE_INV_RANGE, start, start + PAGE_SIZE); in mn10300_icache_inv_page()
57 void mn10300_icache_inv_range(unsigned long start, unsigned long end) in mn10300_icache_inv_range() argument
62 mn10300_local_icache_inv_range(start, end); in mn10300_icache_inv_range()
63 smp_cache_call(SMP_ICACHE_INV_RANGE, start, end); in mn10300_icache_inv_range()
75 void mn10300_icache_inv_range2(unsigned long start, unsigned long size) in mn10300_icache_inv_range2() argument
80 mn10300_local_icache_inv_range2(start, size); in mn10300_icache_inv_range2()
81 smp_cache_call(SMP_ICACHE_INV_RANGE, start, start + size); in mn10300_icache_inv_range2()
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| D | cache-flush-icache.c | 27 unsigned long start = page_to_phys(page); in flush_icache_page() local
32 mn10300_local_dcache_flush_page(start); in flush_icache_page()
33 mn10300_local_icache_inv_page(start); in flush_icache_page()
35 smp_cache_call(SMP_IDCACHE_INV_FLUSH_RANGE, start, start + PAGE_SIZE); in flush_icache_page()
50 static void flush_icache_page_range(unsigned long start, unsigned long end) in flush_icache_page_range() argument
60 off = start & ~PAGE_MASK; in flush_icache_page_range()
61 size = end - start; in flush_icache_page_range()
65 pgd = pgd_offset(current->mm, start); in flush_icache_page_range()
69 pud = pud_offset(pgd, start); in flush_icache_page_range()
73 pmd = pmd_offset(pud, start); in flush_icache_page_range()
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| D | cache-inv-icache.c | 28 static void flush_icache_page_range(unsigned long start, unsigned long end) in flush_icache_page_range() argument
38 off = start & ~PAGE_MASK; in flush_icache_page_range()
39 size = end - start; in flush_icache_page_range()
43 pgd = pgd_offset(current->mm, start); in flush_icache_page_range()
47 pud = pud_offset(pgd, start); in flush_icache_page_range()
51 pmd = pmd_offset(pud, start); in flush_icache_page_range()
55 ppte = pte_offset_map(pmd, start); in flush_icache_page_range()
72 smp_cache_call(SMP_ICACHE_INV_RANGE, start, end); in flush_icache_page_range()
84 void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() argument
95 if (start >= end) in flush_icache_range()
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| /arch/mips/pci/ |
| D | pci-malta.c | 42 .start = 0x00000000UL,
93 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask; in mips_pcibios_init() local
115 start = GT_READ(GT_PCI0M0LD_OFS); in mips_pcibios_init()
118 end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK); in mips_pcibios_init()
124 if (end1 - start1 > end - start) { in mips_pcibios_init()
125 start = start1; in mips_pcibios_init()
129 mask = ~(start ^ end); in mips_pcibios_init()
131 BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) && in mips_pcibios_init()
133 gt64120_mem_resource.start = start; in mips_pcibios_init()
135 gt64120_controller.mem_offset = (start & mask) - (map & mask); in mips_pcibios_init()
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| /arch/xtensa/mm/ |
| D | init.c | 43 sysmem.bank[i].start, sysmem.bank[i].end, in sysmem_dump()
44 (sysmem.bank[i].end - sysmem.bank[i].start) >> 10); in sysmem_dump()
50 static inline struct meminfo * __init find_bank(unsigned long start) in find_bank() argument
56 if (sysmem.bank[i].start <= start) in find_bank()
88 int __init add_sysmem_bank(unsigned long start, unsigned long end) in add_sysmem_bank() argument
95 if (start == end || in add_sysmem_bank()
96 (start < end) != (PAGE_ALIGN(start) < (end & PAGE_MASK))) { in add_sysmem_bank()
98 start, end - start); in add_sysmem_bank()
102 start = PAGE_ALIGN(start); in add_sysmem_bank()
104 sz = end - start; in add_sysmem_bank()
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| /arch/hexagon/mm/ |
| D | cache.c | 25 #define spanlines(start, end) \ argument
26 (((end - (start & ~(LINESIZE - 1))) >> LINEBITS) + 1)
28 void flush_dcache_range(unsigned long start, unsigned long end) in flush_dcache_range() argument
30 unsigned long lines = spanlines(start, end-1); in flush_dcache_range()
33 start &= ~(LINESIZE - 1); in flush_dcache_range()
41 : "r" (start) in flush_dcache_range()
43 start += LINESIZE; in flush_dcache_range()
48 void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() argument
50 unsigned long lines = spanlines(start, end-1); in flush_icache_range()
53 start &= ~(LINESIZE - 1); in flush_icache_range()
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| /arch/arm/mm/ |
| D | cache-feroceon-l2.c | 73 static inline void l2_clean_pa_range(unsigned long start, unsigned long end) in l2_clean_pa_range() argument
82 BUG_ON((start ^ end) >> PAGE_SHIFT); in l2_clean_pa_range()
84 va_start = l2_get_va(start); in l2_clean_pa_range()
85 va_end = va_start + (end - start); in l2_clean_pa_range()
104 static inline void l2_inv_pa_range(unsigned long start, unsigned long end) in l2_inv_pa_range() argument
113 BUG_ON((start ^ end) >> PAGE_SHIFT); in l2_inv_pa_range()
115 va_start = l2_get_va(start); in l2_inv_pa_range()
116 va_end = va_start + (end - start); in l2_inv_pa_range()
142 static unsigned long calc_range_end(unsigned long start, unsigned long end) in calc_range_end() argument
146 BUG_ON(start & (CACHE_LINE_SIZE - 1)); in calc_range_end()
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| D | cache-xsc3l2.c | 98 static void xsc3_l2_inv_range(unsigned long start, unsigned long end) in xsc3_l2_inv_range() argument
102 if (start == 0 && end == -1ul) { in xsc3_l2_inv_range()
112 if (start & (CACHE_LINE_SIZE - 1)) { in xsc3_l2_inv_range()
113 vaddr = l2_map_va(start & ~(CACHE_LINE_SIZE - 1), vaddr); in xsc3_l2_inv_range()
116 start = (start | (CACHE_LINE_SIZE - 1)) + 1; in xsc3_l2_inv_range()
122 while (start < (end & ~(CACHE_LINE_SIZE - 1))) { in xsc3_l2_inv_range()
123 vaddr = l2_map_va(start, vaddr); in xsc3_l2_inv_range()
125 start += CACHE_LINE_SIZE; in xsc3_l2_inv_range()
131 if (start < end) { in xsc3_l2_inv_range()
132 vaddr = l2_map_va(start, vaddr); in xsc3_l2_inv_range()
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| /arch/blackfin/include/asm/ |
| D | cacheflush.h | 28 #define flush_cache_range(vma, start, end) do { } while (0) argument
30 #define flush_cache_vmap(start, end) do { } while (0) argument
31 #define flush_cache_vunmap(start, end) do { } while (0) argument
34 #define flush_icache_range_others(start, end) \ argument
35 smp_icache_flush_range_others((start), (end))
37 #define flush_icache_range_others(start, end) do { } while (0) argument
40 static inline void flush_icache_range(unsigned start, unsigned end) in flush_icache_range() argument
44 blackfin_dcache_flush_range(start, end); in flush_icache_range()
47 if (start >= L2_START && end <= L2_START + L2_LENGTH) in flush_icache_range()
48 blackfin_dcache_flush_range(start, end); in flush_icache_range()
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| /arch/arm/mach-omap1/ |
| D | mcbsp.c | 100 .start = OMAP7XX_MCBSP1_BASE,
106 .start = INT_7XX_McBSP1RX,
111 .start = INT_7XX_McBSP1TX,
116 .start = 9,
121 .start = 8,
127 .start = OMAP7XX_MCBSP2_BASE,
133 .start = INT_7XX_McBSP2RX,
138 .start = INT_7XX_McBSP2TX,
143 .start = 11,
148 .start = 10,
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| /arch/x86/kernel/ |
| D | probe_roms.c | 26 .start = 0xf0000,
33 .start = 0xe0000,
40 .start = 0xc8000,
45 .start = 0,
50 .start = 0,
55 .start = 0,
60 .start = 0,
65 .start = 0,
72 .start = 0xc0000,
126 rom = isa_bus_to_virt(res->start); in find_oprom()
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| /arch/score/mm/ |
| D | cache.c | 173 unsigned long start, unsigned long end) in flush_cache_range() argument
185 pgdp = pgd_offset(mm, start); in flush_cache_range()
186 pudp = pud_offset(pgdp, start); in flush_cache_range()
187 pmdp = pmd_offset(pudp, start); in flush_cache_range()
188 ptep = pte_offset(pmdp, start); in flush_cache_range()
190 while (start <= end) { in flush_cache_range()
192 pgdp = pgd_offset(mm, start); in flush_cache_range()
193 pudp = pud_offset(pgdp, start); in flush_cache_range()
194 pmdp = pmd_offset(pudp, start); in flush_cache_range()
195 ptep = pte_offset(pmdp, start); in flush_cache_range()
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| /arch/arm/mach-pxa/ |
| D | devices.c | 38 .start = IRQ_PMU,
52 .start = 0x41100000,
57 .start = IRQ_MMC,
62 .start = 21,
67 .start = 22,
103 .start = 0x40600000,
108 .start = IRQ_USB,
141 .start = 0x54100000,
146 .start = IRQ_USB2,
167 .start = 0x44000000,
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| /arch/nios2/mm/ |
| D | cacheflush.c | 18 static void __flush_dcache(unsigned long start, unsigned long end) in __flush_dcache() argument
22 start &= ~(cpuinfo.dcache_line_size - 1); in __flush_dcache()
26 if (end > start + cpuinfo.dcache_size) in __flush_dcache()
27 end = start + cpuinfo.dcache_size; in __flush_dcache()
29 for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) { in __flush_dcache()
37 static void __invalidate_dcache(unsigned long start, unsigned long end) in __invalidate_dcache() argument
41 start &= ~(cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
45 for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) { in __invalidate_dcache()
53 static void __flush_icache(unsigned long start, unsigned long end) in __flush_icache() argument
57 start &= ~(cpuinfo.icache_line_size - 1); in __flush_icache()
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| /arch/powerpc/mm/ |
| D | init_64.c | 175 static int __meminit vmemmap_populated(unsigned long start, int page_size) in vmemmap_populated() argument
177 unsigned long end = start + page_size; in vmemmap_populated()
178 start = (unsigned long)(pfn_to_page(vmemmap_section_start(start))); in vmemmap_populated()
180 for (; start < end; start += (PAGES_PER_SECTION * sizeof(struct page))) in vmemmap_populated()
181 if (pfn_valid(page_to_pfn((struct page *)start))) in vmemmap_populated()
195 static void __meminit vmemmap_create_mapping(unsigned long start, in vmemmap_create_mapping() argument
214 BUG_ON(map_kernel_page(start + i, phys, flags)); in vmemmap_create_mapping()
218 static void vmemmap_remove_mapping(unsigned long start, in vmemmap_remove_mapping() argument
224 static void __meminit vmemmap_create_mapping(unsigned long start, in vmemmap_create_mapping() argument
228 int mapped = htab_bolt_mapping(start, start + page_size, phys, in vmemmap_create_mapping()
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| /arch/metag/include/asm/ |
| D | cacheflush.h | 14 void metag_data_cache_flush_all(const void *start);
15 void metag_code_cache_flush_all(const void *start);
24 void metag_data_cache_flush(const void *start, int bytes);
25 void metag_code_cache_flush(const void *start, int bytes);
50 unsigned long start, unsigned long end) in flush_cache_range() argument
76 static inline void flush_cache_vmap(unsigned long start, unsigned long end) in flush_cache_vmap() argument
81 static inline void flush_cache_vunmap(unsigned long start, unsigned long end) in flush_cache_vunmap() argument
93 #define flush_cache_range(vma, start, end) do { } while (0) argument
98 #define flush_cache_vmap(start, end) do { } while (0) argument
99 #define flush_cache_vunmap(start, end) do { } while (0) argument
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| /arch/mips/bcm63xx/ |
| D | dev-enet.c | 48 .start = -1, /* filled at runtime */
53 .start = -1, /* filled at runtime */
58 .start = -1, /* filled at runtime */
75 .start = -1, /* filled at runtime */
80 .start = -1, /* filled at runtime */
84 .start = -1, /* filled at runtime */
88 .start = -1, /* filled at runtime */
107 .start = -1, /* filled at runtime */
112 .start = -1, /* filled at runtime */
116 .start = -1, /* filled at runtime */
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| /arch/c6x/platforms/ |
| D | cache.c | 132 static void cache_block_operation(unsigned int *start, in cache_block_operation() argument
140 - L2_CACHE_ALIGN_LOW((unsigned int) start)) >> 2; in cache_block_operation()
143 for (; wcnt; wcnt -= wc, start += wc) { in cache_block_operation()
160 imcr_set(bar_reg, L2_CACHE_ALIGN_LOW((unsigned int) start)); in cache_block_operation()
177 static void cache_block_operation_nowait(unsigned int *start, in cache_block_operation_nowait() argument
185 - L2_CACHE_ALIGN_LOW((unsigned int) start)) >> 2; in cache_block_operation_nowait()
188 for (; wcnt; wcnt -= wc, start += wc) { in cache_block_operation_nowait()
192 imcr_set(bar_reg, L2_CACHE_ALIGN_LOW((unsigned int) start)); in cache_block_operation_nowait()
325 void enable_caching(unsigned long start, unsigned long end) in enable_caching() argument
327 unsigned int mar = IMCR_MAR_BASE + ((start >> 24) << 2); in enable_caching()
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| /arch/arm64/kernel/ |
| D | sys_compat.c | 32 __do_compat_cache_op(unsigned long start, unsigned long end) in __do_compat_cache_op() argument
37 unsigned long chunk = min(PAGE_SIZE, end - start); in __do_compat_cache_op()
42 ret = __flush_cache_user_range(start, start + chunk); in __do_compat_cache_op()
47 start += chunk; in __do_compat_cache_op()
48 } while (start < end); in __do_compat_cache_op()
54 do_compat_cache_op(unsigned long start, unsigned long end, int flags) in do_compat_cache_op() argument
56 if (end < start || flags) in do_compat_cache_op()
59 if (!access_ok(VERIFY_READ, start, end - start)) in do_compat_cache_op()
62 return __do_compat_cache_op(start, end); in do_compat_cache_op()
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| /arch/s390/mm/ |
| D | vmem.c | 24 unsigned long start; member
78 static int vmem_add_mem(unsigned long start, unsigned long size, int ro) in vmem_add_mem() argument
80 unsigned long end = start + size; in vmem_add_mem()
81 unsigned long address = start; in vmem_add_mem()
146 static void vmem_remove_range(unsigned long start, unsigned long size) in vmem_remove_range() argument
148 unsigned long end = start + size; in vmem_remove_range()
149 unsigned long address = start; in vmem_remove_range()
187 flush_tlb_kernel_range(start, end); in vmem_remove_range()
193 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) in vmemmap_populate() argument
195 unsigned long address = start; in vmemmap_populate()
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| /arch/c6x/include/asm/ |
| D | cache.h | 66 extern void enable_caching(unsigned long start, unsigned long end);
67 extern void disable_caching(unsigned long start, unsigned long end);
80 extern void L1P_cache_block_invalidate(unsigned int start, unsigned int end);
81 extern void L1D_cache_block_invalidate(unsigned int start, unsigned int end);
82 extern void L1D_cache_block_writeback_invalidate(unsigned int start,
84 extern void L1D_cache_block_writeback(unsigned int start, unsigned int end);
85 extern void L2_cache_block_invalidate(unsigned int start, unsigned int end);
86 extern void L2_cache_block_writeback(unsigned int start, unsigned int end);
87 extern void L2_cache_block_writeback_invalidate(unsigned int start,
89 extern void L2_cache_block_invalidate_nowait(unsigned int start,
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| /arch/blackfin/mach-bf548/boards/ |
| D | cm_bf548.c | 55 .start = IRQ_EPPI0_ERR,
105 .start = IRQ_KEY,
133 .start = UART0_DLL,
138 .start = IRQ_UART0_TX,
143 .start = IRQ_UART0_RX,
148 .start = IRQ_UART0_ERROR,
153 .start = CH_UART0_TX,
158 .start = CH_UART0_RX,
181 .start = UART1_DLL,
186 .start = IRQ_UART1_TX,
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| /arch/alpha/mm/ |
| D | numa.c | 62 unsigned long start, end; in setup_memory_node() local
87 start = cluster->start_pfn; in setup_memory_node()
88 end = start + cluster->numpages; in setup_memory_node()
90 if (start >= node_pfn_end || end <= node_pfn_start) in setup_memory_node()
101 if (start < node_pfn_start) in setup_memory_node()
102 start = node_pfn_start; in setup_memory_node()
106 if (start < node_min_pfn) in setup_memory_node()
107 node_min_pfn = start; in setup_memory_node()
172 start = cluster->start_pfn; in setup_memory_node()
173 end = start + cluster->numpages; in setup_memory_node()
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