| /arch/avr32/mach-at32ap/ |
| D | hsmc.c | 33 const struct smc_timing *timing) in smc_set_timing() argument
62 if (timing->ncs_read_setup > 0) in smc_set_timing()
63 config->ncs_read_setup = ns2cyc(timing->ncs_read_setup); in smc_set_timing()
65 if (timing->nrd_setup > 0) in smc_set_timing()
66 config->nrd_setup = ns2cyc(timing->nrd_setup); in smc_set_timing()
68 if (timing->ncs_write_setup > 0) in smc_set_timing()
69 config->ncs_write_setup = ns2cyc(timing->ncs_write_setup); in smc_set_timing()
71 if (timing->nwe_setup > 0) in smc_set_timing()
72 config->nwe_setup = ns2cyc(timing->nwe_setup); in smc_set_timing()
74 if (timing->ncs_read_pulse > 0) in smc_set_timing()
[all …]
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| /arch/arm/boot/dts/ |
| D | exynos5410-smdk5410.dts | 47 samsung,dw-mshc-sdr-timing = <2 3>;
48 samsung,dw-mshc-ddr-timing = <1 2>;
58 samsung,dw-mshc-sdr-timing = <2 3>;
59 samsung,dw-mshc-ddr-timing = <1 2>;
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| D | exynos5260-xyref5260.dts | 76 samsung,dw-mshc-sdr-timing = <0 4>;
77 samsung,dw-mshc-ddr-timing = <0 2>;
89 samsung,dw-mshc-sdr-timing = <2 3>;
90 samsung,dw-mshc-ddr-timing = <1 2>;
|
| D | tegra124-nyan-blaze-emc.dtsi | 6 timing-12750000 {
12 timing-20400000 {
18 timing-40800000 {
24 timing-68000000 {
30 timing-102000000 {
36 timing-204000000 {
42 timing-300000000 {
48 timing-396000000 {
55 timing-600000000 {
61 timing-792000000 {
[all …]
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| D | tegra124-jetson-tk1-emc.dtsi | 6 timing-12750000 {
12 timing-20400000 {
18 timing-40800000 {
24 timing-68000000 {
30 timing-102000000 {
36 timing-204000000 {
42 timing-300000000 {
48 timing-396000000 {
54 timing-528000000 {
60 timing-600000000 {
[all …]
|
| D | tegra124-nyan-big-emc.dtsi | 6 timing-12750000 {
12 timing-20400000 {
18 timing-40800000 {
24 timing-68000000 {
30 timing-102000000 {
36 timing-204000000 {
42 timing-300000000 {
48 timing-396000000 {
55 timing-600000000 {
61 timing-792000000 {
[all …]
|
| D | imx27-eukrea-cpuimx27.dtsi | 112 fsl,weim-cs-timing = <0x00008f03 0xa0330d01 0x002208c0>;
120 fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
133 fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
146 fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
159 fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
|
| D | exynos5420-smdk5420.dts | 105 timing0: timing@0 {
367 samsung,dw-mshc-sdr-timing = <0 4>;
368 samsung,dw-mshc-ddr-timing = <0 2>;
369 samsung,dw-mshc-hs400-timing = <0 2>;
382 samsung,dw-mshc-sdr-timing = <2 3>;
383 samsung,dw-mshc-ddr-timing = <1 2>;
|
| D | imx1-apf9328.dts | 57 fsl,weim-cs-timing = <0x00330e04 0x00000d01>;
72 fsl,weim-cs-timing = <0x0000c700 0x19190d01>;
|
| D | exynos5250-smdk5250.dts | 96 timing0: timing@0 {
359 samsung,dw-mshc-sdr-timing = <2 3>;
360 samsung,dw-mshc-ddr-timing = <1 2>;
372 samsung,dw-mshc-sdr-timing = <2 3>;
373 samsung,dw-mshc-ddr-timing = <1 2>;
|
| D | r8a77xx-aa121td01-panel.dtsi | 18 panel-timing {
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| D | r8a77xx-aa104xd12-panel.dtsi | 18 panel-timing {
|
| D | exynos5422-odroidxu3-common.dtsi | 337 samsung,dw-mshc-sdr-timing = <0 4>;
338 samsung,dw-mshc-ddr-timing = <0 2>;
339 samsung,dw-mshc-hs400-timing = <0 2>;
353 samsung,dw-mshc-sdr-timing = <0 4>;
354 samsung,dw-mshc-ddr-timing = <0 2>;
|
| D | omap3-devkit8000-lcd70.dts | 20 panel-timing {
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| D | omap3-devkit8000-lcd43.dts | 20 panel-timing {
|
| D | exynos5420-arndale-octa.dts | 359 samsung,dw-mshc-sdr-timing = <0 4>;
360 samsung,dw-mshc-ddr-timing = <0 2>;
372 samsung,dw-mshc-sdr-timing = <2 3>;
373 samsung,dw-mshc-ddr-timing = <1 2>;
|
| D | atlas6-evb.dts | 74 timing = <0x88>;
|
| D | exynos5250-arndale.dts | 136 timing0: timing@0 {
531 samsung,dw-mshc-sdr-timing = <2 3>;
532 samsung,dw-mshc-ddr-timing = <1 2>;
545 samsung,dw-mshc-sdr-timing = <2 3>;
546 samsung,dw-mshc-ddr-timing = <1 2>;
|
| D | exynos5250-snow-common.dtsi | 526 samsung,dw-mshc-sdr-timing = <2 3>;
527 samsung,dw-mshc-ddr-timing = <1 2>;
539 samsung,dw-mshc-sdr-timing = <2 3>;
540 samsung,dw-mshc-ddr-timing = <1 2>;
560 samsung,dw-mshc-sdr-timing = <2 3>;
561 samsung,dw-mshc-ddr-timing = <1 2>;
|
| D | omap4-var-dvk-om44.dts | 26 panel-timing {
|
| /arch/arm64/boot/dts/exynos/ |
| D | exynos7-espresso.dts | 64 samsung,dw-mshc-sdr-timing = <0 4>;
65 samsung,dw-mshc-ddr-timing = <0 2>;
78 samsung,dw-mshc-sdr-timing = <2 3>;
79 samsung,dw-mshc-ddr-timing = <1 2>;
|
| /arch/avr32/mach-at32ap/include/mach/ |
| D | smc.h | 108 const struct smc_timing *timing);
|
| /arch/mips/include/asm/mach-rc32434/ |
| D | rb.h | 65 u32 timing; member
|
| /arch/arm/mach-davinci/ |
| D | aemif.c | 205 if (pdata->timing) in davinci_aemif_setup()
206 ret = davinci_aemif_setup_timing(pdata->timing, base, pdev->id, in davinci_aemif_setup()
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| /arch/cris/arch-v32/mach-a3/ |
| D | Kconfig | 23 hex "DDR2 SDRAM timing"
26 SDRAM timing parameters.
|