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Searched refs:tr (Results 1 – 25 of 41) sorted by relevance

12

/arch/x86/kernel/cpu/mcheck/
Dmce_amd.c153 struct thresh_restart *tr = _tr; in threshold_restart_bank() local
156 rdmsr(tr->b->address, lo, hi); in threshold_restart_bank()
158 if (tr->b->threshold_limit < (hi & THRESHOLD_MAX)) in threshold_restart_bank()
159 tr->reset = 1; /* limit cannot be lower than err count */ in threshold_restart_bank()
161 if (tr->reset) { /* reset err count and overflow bit */ in threshold_restart_bank()
164 (THRESHOLD_MAX - tr->b->threshold_limit); in threshold_restart_bank()
165 } else if (tr->old_limit) { /* change limit w/o reset */ in threshold_restart_bank()
167 (tr->old_limit - tr->b->threshold_limit); in threshold_restart_bank()
176 if (!tr->b->interrupt_capable) in threshold_restart_bank()
179 if (tr->set_lvt_off) { in threshold_restart_bank()
[all …]
/arch/s390/boot/
DMakefile6 tr -c '[0-9A-Za-z]' '_'`__`date | \
7 tr -c '[0-9A-Za-z]' '_'`_t
/arch/cris/boot/rescue/
DMakefile40 $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/testrescue.o tr.bin
43 cat tr.bin tmp2423 >testrescue_tmp.bin
45 rm tr.bin tmp2423 testrescue_tmp.bin
/arch/x86/include/asm/
Ddesc.h94 #define load_tr(tr) asm volatile("ltr %0"::"m" (tr)) argument
99 #define store_tr(tr) (tr = native_store_tr()) argument
238 unsigned long tr; in native_store_tr() local
240 asm volatile("str %0":"=r" (tr)); in native_store_tr()
242 return tr; in native_store_tr()
Dsuspend_32.h23 unsigned long tr; member
Dsuspend_64.h36 unsigned long tr; member
Dsvm.h150 struct vmcb_seg tr; member
/arch/powerpc/sysdev/
Duic.c128 u32 tr, pr, mask; in uic_set_irq_type() local
154 tr = mfdcr(uic->dcrbase + UIC_TR); in uic_set_irq_type()
156 tr = (tr & mask) | (trigger << (31-src)); in uic_set_irq_type()
160 mtdcr(uic->dcrbase + UIC_TR, tr); in uic_set_irq_type()
/arch/x86/crypto/
Dcamellia_glue.c819 u32 dw, tl, tr; in camellia_setup_tail() local
932 tr = subRL[10] ^ rol32(dw, 1); in camellia_setup_tail()
933 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
941 tr = subRL[7] ^ rol32(dw, 1); in camellia_setup_tail()
942 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
952 tr = subRL[18] ^ rol32(dw, 1); in camellia_setup_tail()
953 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
961 tr = subRL[15] ^ rol32(dw, 1); in camellia_setup_tail()
962 tt = (tr | ((u64)tl << 32)); in camellia_setup_tail()
976 tr = subRL[26] ^ rol32(dw, 1); in camellia_setup_tail()
[all …]
/arch/x86/entry/syscalls/
Dsyscalltbl.sh8 abi=`echo "$abi" | tr '[a-z]' '[A-Z]'`
Dsyscallhdr.sh5 my_abis=`echo "($3)" | tr ',' '|'`
/arch/ia64/scripts/
Dcheck-gas8 res=$($OBJDUMP -r --section .data $out | fgrep 00004 | tr -s ' ' |cut -f3 -d' ')
/arch/cris/arch-v10/kernel/
Dfasttimer.c647 static struct fast_timer tr[10]; variable
666 start_one_shot_timer(&tr[i], test_timeout1, i, 1000, "timeout1"); in test_timeout1()
720 start_one_shot_timer(&tr[i], test_timeout, i, 50000, "test0"); in fast_timer_test()
723 start_one_shot_timer(&tr[i], test_timeout, i, 70000, "test1"); in fast_timer_test()
726 start_one_shot_timer(&tr[i], test_timeout, i, 40000, "test2"); in fast_timer_test()
729 start_one_shot_timer(&tr[i], test_timeout, i, 60000, "test3"); in fast_timer_test()
732 start_one_shot_timer(&tr[i], test_timeout1, i, 55000, "test4xx"); in fast_timer_test()
771 struct fast_timer *t = &tr[j]; in fast_timer_test()
/arch/cris/arch-v32/kernel/
Dfasttimer.c620 static struct fast_timer tr[10]; variable
639 start_one_shot_timer(&tr[i], test_timeout1, i, 1000, "timeout1"); in test_timeout1()
693 start_one_shot_timer(&tr[i], test_timeout, i, 50000, "test0"); in fast_timer_test()
696 start_one_shot_timer(&tr[i], test_timeout, i, 70000, "test1"); in fast_timer_test()
699 start_one_shot_timer(&tr[i], test_timeout, i, 40000, "test2"); in fast_timer_test()
702 start_one_shot_timer(&tr[i], test_timeout, i, 60000, "test3"); in fast_timer_test()
705 start_one_shot_timer(&tr[i], test_timeout1, i, 55000, "test4xx"); in fast_timer_test()
742 struct fast_timer *t = &tr[j]; in fast_timer_test()
/arch/tile/include/arch/
Dmpipe_shm.h228 uint_reg_t tr : 1; member
329 uint_reg_t tr : 1;
/arch/sh/include/asm/
Dptrace.h35 {.name = __stringify(tr##num), .offset = offsetof(struct pt_regs, tregs[num])}
/arch/powerpc/kvm/
De500_mmu.c473 struct kvm_translation *tr) in kvmppc_core_vcpu_translate() argument
480 eaddr = tr->linear_address; in kvmppc_core_vcpu_translate()
481 pid = (tr->linear_address >> 32) & 0xff; in kvmppc_core_vcpu_translate()
482 as = (tr->linear_address >> 40) & 0x1; in kvmppc_core_vcpu_translate()
486 tr->valid = 0; in kvmppc_core_vcpu_translate()
490 tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr); in kvmppc_core_vcpu_translate()
492 tr->valid = 1; in kvmppc_core_vcpu_translate()
/arch/blackfin/boot/
DMakefile38 cmd_mk_bin_xip = ( printf '%64s' | tr ' ' '\377' ; cat $< ) > $@
/arch/mips/include/asm/txx9/
Dtx4927.h81 u64 tr; member
Dtx3927.h27 volatile unsigned long tr[3]; member
/arch/arm/kvm/
Dguest.c289 struct kvm_translation *tr) in kvm_arch_vcpu_ioctl_translate() argument
/arch/mips/kernel/
Dgenex.S505 BUILD_HANDLER tr tr sti silent /* #13 */
/arch/mips/txx9/generic/
Dsetup_tx4927.c210 (unsigned long long)____raw_readq(&tx4927_sdramcptr->tr)); in tx4927_setup()
/arch/x86/include/uapi/asm/
Dkvm.h148 struct kvm_segment tr, ldt; member
/arch/x86/power/
Dcpu.c100 store_tr(ctxt->tr); in __save_processor_state()

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