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Searched refs:uint_reg_t (Results 1 – 12 of 12) sorted by relevance

/arch/tile/include/arch/
Dmpipe_shm.h46 uint_reg_t gen : 1;
52 uint_reg_t efifo_sel : 6;
54 uint_reg_t r0 : 1;
56 uint_reg_t csum : 1;
61 uint_reg_t ns : 1;
65 uint_reg_t notif : 1;
71 uint_reg_t bound : 1;
73 uint_reg_t r1 : 4;
83 uint_reg_t xfer_size : 14;
85 uint_reg_t r2 : 2;
[all …]
Duart.h39 uint_reg_t divisor : 12;
41 uint_reg_t __reserved : 52;
43 uint_reg_t __reserved : 52;
44 uint_reg_t divisor : 12;
48 uint_reg_t word;
64 uint_reg_t rfifo_count : 9;
66 uint_reg_t __reserved_0 : 7;
72 uint_reg_t tfifo_count : 9;
74 uint_reg_t __reserved_1 : 7;
80 uint_reg_t wfifo_count : 3;
[all …]
Dmpipe.h39 uint_reg_t __reserved_0 : 3;
41 uint_reg_t ring : 8;
43 uint_reg_t bucket : 13;
45 uint_reg_t ring_enable : 1;
47 uint_reg_t bucket_enable : 1;
52 uint_reg_t region : 3;
54 uint_reg_t __reserved_1 : 6;
56 uint_reg_t svc_dom : 5;
58 uint_reg_t __reserved_2 : 24;
60 uint_reg_t __reserved_2 : 24;
[all …]
Dtrio_pcie_intfc.h37 uint_reg_t strap_state : 3;
39 uint_reg_t __reserved_0 : 1;
44 uint_reg_t ovd_dev_type : 1;
46 uint_reg_t ovd_dev_type_val : 4;
48 uint_reg_t train_mode : 2;
50 uint_reg_t __reserved_1 : 1;
59 uint_reg_t rx_lane_flip : 1;
68 uint_reg_t tx_lane_flip : 1;
73 uint_reg_t stream_width : 2;
78 uint_reg_t stream_rate : 2;
[all …]
Dtrio_pcie_rc.h36 uint_reg_t mps_sup : 3;
42 uint_reg_t phantom_function_supported : 2;
44 uint_reg_t ext_tag_field_supported : 1;
46 uint_reg_t __reserved_0 : 3;
48 uint_reg_t l1_lat : 3;
53 uint_reg_t r1 : 1;
58 uint_reg_t r2 : 1;
63 uint_reg_t r3 : 1;
69 uint_reg_t rer : 1;
71 uint_reg_t __reserved_1 : 2;
[all …]
Dtrio.h45 uint_reg_t doorbell : 1;
50 uint_reg_t pop : 1;
52 uint_reg_t __reserved : 62;
54 uint_reg_t __reserved : 62;
55 uint_reg_t pop : 1;
56 uint_reg_t doorbell : 1;
60 uint_reg_t word;
77 uint_reg_t reg_addr : 12;
79 uint_reg_t fn : 3;
81 uint_reg_t dev : 5;
[all …]
Dtrio_shm.h53 uint_reg_t bsz : 3;
63 uint_reg_t c : 1;
69 uint_reg_t notif : 1;
83 uint_reg_t smod : 1;
88 uint_reg_t xsize : 14;
90 uint_reg_t __reserved_0 : 1;
97 uint_reg_t gen : 1;
99 uint_reg_t gen : 1;
100 uint_reg_t __reserved_0 : 1;
101 uint_reg_t xsize : 14;
[all …]
/arch/tile/include/uapi/arch/
Dabi.h78 typedef __uint_reg_t uint_reg_t; typedef
Dsim.h448 (mpipe << 8) | (1 << 16) | ((uint_reg_t)link_mask << 32))); in sim_enable_mpipe_links()
457 (mpipe << 8) | (0 << 16) | ((uint_reg_t)link_mask << 32))); in sim_disable_mpipe_links()
/arch/tile/include/uapi/asm/
Dptrace.h47 typedef uint_reg_t pt_reg_t;
/arch/tile/lib/
Dcacheflush.c68 uint_reg_t old_dstream_pf = __insn_mfspr(SPR_DSTREAM_PF); in finv_buffer_remote()
/arch/tile/include/gxio/
Dmpipe.h1444 uint_reg_t ew[2], in gxio_mpipe_equeue_put_at_aux()