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Searched refs:v6 (Results 1 – 21 of 21) sorted by relevance

/arch/arm/mm/
DMakefile36 obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
42 obj-$(CONFIG_CPU_CACHE_V6) += cache-v6.o
47 AFLAGS_cache-v6.o :=-Wa,-march=armv6
53 obj-$(CONFIG_CPU_COPY_V6) += copypage-v6.o context.o
65 obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o
69 AFLAGS_tlb-v6.o :=-Wa,-march=armv6
93 obj-$(CONFIG_CPU_V6) += proc-v6.o
94 obj-$(CONFIG_CPU_V6K) += proc-v6.o
98 AFLAGS_proc-v6.o :=-Wa,-march=armv6
Dcache-v6.S352 define_cache_functions v6
Dproc-v6.S259 define_processor_functions v6, dabort=v6_early_abort, pabort=v6_pabort, suspend=1
/arch/arm64/crypto/
Daes-modes.S234 mov v6.16b, v2.16b
241 eor v3.16b, v3.16b, v6.16b
315 eor v1.16b, v6.16b, v1.16b
425 next_tweak v6, v5, v7, v8
427 eor v2.16b, v2.16b, v6.16b
428 next_tweak v7, v6, v7, v8
434 eor v2.16b, v2.16b, v6.16b
497 next_tweak v6, v5, v7, v8
499 eor v2.16b, v2.16b, v6.16b
500 next_tweak v7, v6, v7, v8
[all …]
Dpoly-hash-ce-core.S23 XM .req v6
Dghash-ce-core.S20 XM .req v6
Dsha2-ce-core.S113 add_update 1, v6, 17, 18, 19, 16
Dsha1-ce-core.S26 dgav .req v6
Dspeck-neon-core.S31 X_3 .req v6
/arch/powerpc/boot/dts/fsl/
Dqoriq-sec6.0-0.dtsi35 compatible = "fsl,sec-v6.0", "fsl,sec-v5.0",
42 compatible = "fsl,sec-v6.0-job-ring",
51 compatible = "fsl,sec-v6.0-job-ring",
/arch/powerpc/lib/
Dcopypage_power7.S87 lvx v6,r4,r6
96 stvx v6,r3,r6
Dmemcpy_power7.S370 lvx v6,r4,r9
379 stvx v6,r3,r9
557 lvx v6,r4,r9
558 VPERM(v9,v7,v6,v16)
560 VPERM(v10,v6,v5,v16)
Dcopyuser_power7.S437 err4; lvx v6,r4,r9
446 err4; stvx v6,r3,r9
623 err4; lvx v6,r4,r9
624 VPERM(v9,v7,v6,v16)
626 VPERM(v10,v6,v5,v16)
/arch/arm/include/asm/
Dglue-cache.h108 # define _CACHE v6
/arch/unicore32/lib/
Dbacktrace.S20 #define sv_pc v6
117 #define stack v6
/arch/arm/boot/dts/
Dbcm5301x.dtsi184 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
Dbcm-cygnus.dtsi233 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
Dexynos5250.dtsi262 compatible = "samsung,mfc-v6";
/arch/s390/include/asm/
Dvx-insn.h114 .ifc \vxr,%v6
/arch/arm/boot/compressed/
Dhead.S721 @ Enable unaligned access on v6, to allow better code generation
726 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
771 orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
/arch/powerpc/include/asm/
Dppc_asm.h658 #define v6 6 macro