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Searched refs:vcpu_sys_reg (Results 1 – 8 of 8) sorted by relevance

/arch/arm64/kvm/
Ddebug.c49 vcpu->arch.guest_debug_preserved.mdscr_el1 = vcpu_sys_reg(vcpu, MDSCR_EL1); in save_guest_debug_regs()
57 vcpu_sys_reg(vcpu, MDSCR_EL1) = vcpu->arch.guest_debug_preserved.mdscr_el1; in restore_guest_debug_regs()
60 vcpu_sys_reg(vcpu, MDSCR_EL1)); in restore_guest_debug_regs()
149 vcpu_sys_reg(vcpu, MDSCR_EL1) |= DBG_MDSCR_SS; in kvm_arm_setup_debug()
151 vcpu_sys_reg(vcpu, MDSCR_EL1) &= ~DBG_MDSCR_SS; in kvm_arm_setup_debug()
167 vcpu_sys_reg(vcpu, MDSCR_EL1) |= DBG_MDSCR_MDE; in kvm_arm_setup_debug()
191 trace_kvm_arm_set_dreg32("MDSCR_EL1", vcpu_sys_reg(vcpu, MDSCR_EL1)); in kvm_arm_setup_debug()
Dinject_fault.c112 *vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + EL1_EXCEPT_SYNC_OFFSET; in inject_abt64()
114 vcpu_sys_reg(vcpu, FAR_EL1) = addr; in inject_abt64()
135 vcpu_sys_reg(vcpu, ESR_EL1) = esr | ESR_ELx_FSC_EXTABT; in inject_abt64()
147 *vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + EL1_EXCEPT_SYNC_OFFSET; in inject_undef64()
156 vcpu_sys_reg(vcpu, ESR_EL1) = esr; in inject_undef64()
Dsys_regs_generic_v8.c40 p->regval = vcpu_sys_reg(vcpu, ACTLR_EL1); in access_actlr()
49 vcpu_sys_reg(vcpu, ACTLR_EL1) = actlr; in reset_actlr()
Dsys_regs.h110 vcpu_sys_reg(vcpu, r->reg) = 0x1de7ec7edbadc0deULL; in reset_unknown()
117 vcpu_sys_reg(vcpu, r->reg) = r->val; in reset_val()
Dsys_regs.c105 vcpu_sys_reg(vcpu, r->reg) = p->regval; in access_vm_reg()
202 vcpu_sys_reg(vcpu, r->reg) = p->regval; in trap_debug_regs()
205 p->regval = vcpu_sys_reg(vcpu, r->reg); in trap_debug_regs()
421 vcpu_sys_reg(vcpu, AMAIR_EL1) = amair; in reset_amair_el1()
438 vcpu_sys_reg(vcpu, MPIDR_EL1) = (1ULL << 31) | mpidr; in reset_mpidr()
1540 return reg_to_user(uaddr, &vcpu_sys_reg(vcpu, r->reg), reg->id); in kvm_arm_sys_reg_get_reg()
1561 return reg_from_user(&vcpu_sys_reg(vcpu, r->reg), uaddr, reg->id); in kvm_arm_sys_reg_set_reg()
1756 if (vcpu_sys_reg(vcpu, num) == 0x4242424242424242) in kvm_reset_sys_regs()
/arch/arm64/include/asm/
Dkvm_emulate.h227 return vcpu_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK; in kvm_vcpu_get_mpidr_aff()
235 vcpu_sys_reg(vcpu, SCTLR_EL1) |= (1 << 25); in kvm_vcpu_set_be()
243 return !!(vcpu_sys_reg(vcpu, SCTLR_EL1) & (1 << 25)); in kvm_vcpu_is_be()
Dkvm_host.h176 #define vcpu_sys_reg(v,r) ((v)->arch.ctxt.sys_regs[(r)]) macro
Dkvm_mmu.h230 return (vcpu_sys_reg(vcpu, SCTLR_EL1) & 0b101) == 0b101; in vcpu_has_cache_enabled()