/drivers/gpu/drm/amd/amdgpu/ |
D | gfx_v8_0.c | 1517 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v8_0_tiling_mode_table_init() 1523 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v8_0_tiling_mode_table_init() 1559 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v8_0_tiling_mode_table_init() 1565 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v8_0_tiling_mode_table_init() 2407 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v8_0_tiling_mode_table_init() 2413 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v8_0_tiling_mode_table_init() 2675 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v8_0_tiling_mode_table_init() 2681 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v8_0_tiling_mode_table_init()
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D | gfx_v7_0.c | 1804 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v7_0_tiling_mode_table_init() 1810 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in gfx_v7_0_tiling_mode_table_init()
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/drivers/gpu/drm/amd/include/asic_reg/bif/ |
D | bif_5_1_enum.h | 960 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | bif_5_0_enum.h | 1090 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
D | gmc_8_2_enum.h | 960 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | gmc_8_1_enum.h | 1090 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/smu/ |
D | smu_8_0_enum.h | 960 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | smu_7_1_0_enum.h | 1119 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | smu_7_1_3_enum.h | 1174 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | smu_7_1_1_enum.h | 1120 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | smu_7_1_2_enum.h | 1138 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
D | uvd_6_0_enum.h | 973 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | uvd_5_0_enum.h | 1103 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_2_4_enum.h | 1255 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | oss_3_0_enum.h | 1389 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | oss_3_0_1_enum.h | 1356 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/dce/ |
D | dce_10_0_enum.h | 1665 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | dce_11_0_enum.h | 5532 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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/drivers/gpu/drm/radeon/ |
D | sid.h | 1208 # define ADDR_SURF_BANK_WIDTH_4 2 macro
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D | cikd.h | 1265 # define ADDR_SURF_BANK_WIDTH_4 2 macro
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D | evergreend.h | 2175 # define ADDR_SURF_BANK_WIDTH_4 2 macro
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D | cik.c | 3346 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in cik_tiling_mode_table_init() 3352 gb_tile_moden = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_4) | in cik_tiling_mode_table_init()
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/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_7_2_enum.h | 6202 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | gfx_8_0_enum.h | 6750 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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D | gfx_8_1_enum.h | 6700 ADDR_SURF_BANK_WIDTH_4 = 0x2, enumerator
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