Searched refs:AR_RTC_9300_SOC_PLL_DIV_INT (Results 1 – 2 of 2) sorted by relevance
| /drivers/net/wireless/ath/ath9k/ | ||
| D | reg.h | 1265 #define AR_RTC_9300_SOC_PLL_DIV_INT 0x0000003f macro |
| D | ar9003_phy.c | 614 pll |= SM(0x2c, AR_RTC_9300_SOC_PLL_DIV_INT); in ar9003_hw_compute_pll_control_soc() |