Searched refs:AR_RTC_PLL_DIV (Results 1 – 2 of 2) sorted by relevance
931 pll |= SM(0xa, AR_RTC_PLL_DIV); in ar5008_hw_compute_pll_control()933 pll |= SM(0xb, AR_RTC_PLL_DIV); in ar5008_hw_compute_pll_control()
1314 #define AR_RTC_PLL_DIV 0x0000001f macro