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Searched refs:AR_SREV_9300_20_OR_LATER (Results 1 – 12 of 12) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dreg.h23 #define AR_CR_RXE (AR_SREV_9300_20_OR_LATER(ah) ? 0x0000000c : 0x00000004)
345 #define AR_ISR_S2_S (AR_SREV_9300_20_OR_LATER(ah) ? 0x00d0 : 0x00cc)
346 #define AR_ISR_S3_S (AR_SREV_9300_20_OR_LATER(ah) ? 0x00d4 : 0x00d0)
347 #define AR_ISR_S4_S (AR_SREV_9300_20_OR_LATER(ah) ? 0x00d8 : 0x00d4)
348 #define AR_ISR_S5_S (AR_SREV_9300_20_OR_LATER(ah) ? 0x00dc : 0x00d8)
881 #define AR_SREV_9300_20_OR_LATER(_ah) \ macro
1132 (AR_SREV_9300_20_OR_LATER(ah) ? 0x4050 : 0x404c))
1157 (AR_SREV_9300_20_OR_LATER(ah) ? 0x4058 : 0x4050))
1162 (AR_SREV_9300_20_OR_LATER(ah) ? 0x405c : 0x4054))
1181 (AR_SREV_9300_20_OR_LATER(ah) ? 0x4060 : 0x4058))
[all …]
Dhw.c353 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_chip_test()
404 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_init_config()
476 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_init_defaults()
524 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_post_init()
544 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_post_init()
557 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_attach_ops()
606 if (AR_SREV_9300_20_OR_LATER(ah)) { in __ath9k_hw_init()
948 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_init_interrupt_masks()
981 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_init_interrupt_masks()
1180 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_set_dma()
[all …]
Dbtcoex.c71 if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_init_btcoex_hw()
108 } else if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_init_scheme()
224 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_set_weight()
275 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_enable_3wire()
364 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_btcoex_disable()
374 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_disable()
392 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_bt_stomp()
Dani.c197 else if (AR_SREV_9300_20_OR_LATER(ah) && in ath9k_hw_set_ofdm_nil()
202 else if (!AR_SREV_9300_20_OR_LATER(ah) && in ath9k_hw_set_ofdm_nil()
210 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_set_ofdm_nil()
272 if (!AR_SREV_9300_20_OR_LATER(ah) || AR_SREV_9485(ah) || in ath9k_hw_set_cck_nil()
502 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_ani_init()
516 ani->mrcCCK = AR_SREV_9300_20_OR_LATER(ah) ? true : false; in ath9k_hw_ani_init()
Dmac.c461 if (AR_SREV_9300_20_OR_LATER(ah) && in ath9k_hw_resettxqueue()
504 if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_resettxqueue()
712 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_stopdmarecv()
900 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_set_interrupts()
Dcommon-init.c198 else if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_cmn_setup_ht_cap()
Dtx99.c279 if (!AR_SREV_9300_20_OR_LATER(sc->sc_ah)) in ath9k_tx99_init_debug()
Deeprom.c564 if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_eeprom_init()
Dmain.c219 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath_prepare_reset()
709 if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_start()
2274 if (AR_SREV_9300_20_OR_LATER(ah)) in validate_antenna_mask()
Dar9003_calib.c322 if (AR_SREV_9300_20_OR_LATER(ah)) { in ar9003_hw_init_cal_settings()
Ddebug.c922 max_reg_offset = AR_SREV_9300_20_OR_LATER(sc->sc_ah) ? 0x16bd4 : 0xb500; in open_file_regdump()
Dxmit.c1104 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath_get_rate_txpower()