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Searched refs:AR_SREV_9565 (Results 1 – 17 of 17) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dar9003_phy.h653 #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x…
654 #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1)
685 (((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x1628c : 0x16280)))
713 ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x16294 : 0x1628c))
728 ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x16298 : \
735 #define AR_PHY_PMU1 ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x16340 : \
740 #define AR_PHY_PMU2 ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x16344 : \
Dar9003_wow.c52 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) { in ath9k_hw_set_powermode_wow_sleep()
106 if (AR_SREV_9462_20_OR_LATER(ah) || AR_SREV_9565(ah)) { in ath9k_wow_create_keep_alive_pattern()
255 if (AR_SREV_9462(ah) || AR_SREV_9565(ah) || AR_SREV_9485(ah)) { in ath9k_hw_wow_wakeup()
Dar9003_hw.c494 } else if (AR_SREV_9565(ah)) { in ar9003_hw_init_mode_regs()
632 else if (AR_SREV_9565(ah)) in ar9003_tx_gain_table_mode0()
682 else if (AR_SREV_9565(ah)) in ar9003_tx_gain_table_mode1()
713 else if (AR_SREV_9565(ah)) in ar9003_tx_gain_table_mode2()
741 else if (AR_SREV_9565(ah)) in ar9003_tx_gain_table_mode3()
874 else if (AR_SREV_9565(ah)) in ar9003_rx_gain_table_mode0()
928 else if (AR_SREV_9565(ah)) in ar9003_rx_gain_table_mode1()
Dar9003_phy.c168 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) { in ar9003_hw_set_channel()
408 if (!(AR_SREV_9565(ah) && range == 10 && synth_freq == 2437)) in ar9003_hw_spur_ofdm()
581 if (AR_SREV_9565(ah) && (i < 4)) { in ar9003_hw_spur_mitigate_ofdm()
597 if (!AR_SREV_9565(ah)) in ar9003_hw_spur_mitigate()
735 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) { in ar9003_hw_override_ini()
1110 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) in ar9003_hw_ani_control()
1400 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) { in ar9003_hw_set_nf_limits()
1540 } else if (AR_SREV_9565(ah)) { in ar9003_hw_antdiv_comb_conf_get()
1584 if (!AR_SREV_9485(ah) && !AR_SREV_9565(ah)) in ar9003_hw_set_bt_ant_diversity()
1648 } else if (AR_SREV_9565(ah)) { in ar9003_hw_set_bt_ant_diversity()
[all …]
Dreg.h901 #define AR_SREV_9565(_ah) \ macro
904 (AR_SREV_9462(_ah) || AR_SREV_9485(_ah) || AR_SREV_9565(_ah))
908 #define AR_SREV_9565(_ah) 0 macro
947 (AR_SREV_9565(_ah) && \
950 (AR_SREV_9565(_ah) && \
953 (AR_SREV_9565(_ah) && \
956 (AR_SREV_9565(_ah) && \
Dhw.c302 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) in ath9k_hw_read_revisions()
412 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) in ath9k_hw_init_config()
617 if (AR_SREV_9565(ah)) { in __ath9k_hw_init()
770 if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) { in ath9k_hw_init_pll()
915 if (AR_SREV_9565(ah)) in ath9k_hw_init_pll()
2043 if (AR_SREV_9565(ah) && common->bt_ant_diversity) in ath9k_hw_reset()
2068 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) { in ath9k_set_power_sleep()
2443 AR_SREV_9565(ah)) in ath9k_hw_fill_cap_info()
2533 !AR_SREV_9561(ah) && !AR_SREV_9565(ah)) in ath9k_hw_fill_cap_info()
2574 if (AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) { in ath9k_hw_fill_cap_info()
[all …]
Dar9003_paprd.c79 AR_SREV_9462(ah) || AR_SREV_9565(ah)) { in ar9003_get_training_power_2g()
223 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) in ar9003_paprd_setup_single_table()
245 AR_SREV_9565(ah) || in ar9003_paprd_setup_single_table()
257 if (IS_CHAN_2GHZ(ah->curchan) && !AR_SREV_9462(ah) && !AR_SREV_9565(ah)) in ar9003_paprd_setup_single_table()
Dcommon-init.c194 if (AR_SREV_9271(ah) || AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) in ath9k_cmn_setup_ht_cap()
Dar9003_eeprom.c3004 if (AR_SREV_9565(ah)) in ath9k_hw_ar9300_get_eeprom()
3542 else if (AR_SREV_9462(ah) || AR_SREV_9550(ah) || AR_SREV_9565(ah)) in ar9003_hw_xpa_bias_level_apply()
3600 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) { in ar9003_hw_ant_ctrl_apply()
3624 if (AR_SREV_9462_20_OR_LATER(ah) || AR_SREV_9565(ah)) { in ar9003_hw_ant_ctrl_apply()
3655 if (AR_SREV_9330(ah) || AR_SREV_9485(ah) || AR_SREV_9565(ah)) { in ar9003_hw_ant_ctrl_apply()
3671 if (AR_SREV_9565(ah)) { in ar9003_hw_ant_ctrl_apply()
3701 if ((AR_SREV_9485(ah) || AR_SREV_9565(ah)) in ar9003_hw_ant_ctrl_apply()
3933 } else if (AR_SREV_9462(ah) || AR_SREV_9565(ah) || in ar9003_hw_internal_regulator_apply()
3968 } else if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) in ar9003_hw_internal_regulator_apply()
5318 !AR_SREV_9462(ah) && !AR_SREV_9565(ah)) { in ar9003_paprd_set_txpower()
Dar9003_mci.c815 if (AR_SREV_9565(ah)) in ar9003_mci_osla_setup()
836 if (!AR_SREV_9565(ah)) in ar9003_mci_stat_setup()
930 if (AR_SREV_9565(ah)) { in ar9003_mci_reset()
Dbtcoex.c231 if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) { in ath9k_hw_btcoex_set_weight()
Dar9003_calib.c274 if (AR_SREV_9565(ah) && in ar9003_hw_iqcalibrate()
1314 if (!AR_SREV_9462(ah) && !AR_SREV_9565(ah) && !AR_SREV_9485(ah)) in ar9003_hw_do_pcoem_manual_peak_cal()
1712 if (AR_SREV_9485(ah) || AR_SREV_9462(ah) || AR_SREV_9565(ah)) in ar9003_hw_attach_calib_ops()
Dani.c273 AR_SREV_9565(ah) || AR_SREV_9561(ah)) in ath9k_hw_set_cck_nil()
Dgpio.c87 else if (AR_SREV_9462(sc->sc_ah) || AR_SREV_9565(sc->sc_ah)) in ath_fill_led_pin()
Deeprom.h112 #define EEP_RFSILENT_GPIO_SEL ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00fc : 0x001c)
Dar9003_mac.c34 desc_len = ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x18 : 0x17); in ar9003_set_txdesc()
Dmci.c160 btcoex->duty_cycle = AR_SREV_9565(sc->sc_ah) ? 40 : 35; in ath_mci_update_scheme()