Searched refs:AR_WA_D3_L1_DISABLE (Results 1 – 3 of 3) sorted by relevance
265 if (ah->config.pcie_waen & AR_WA_D3_L1_DISABLE) in ar9002_hw_configpcipowersave()266 val |= AR_WA_D3_L1_DISABLE; in ar9002_hw_configpcipowersave()269 if (AR9285_WA_DEFAULT & AR_WA_D3_L1_DISABLE) in ar9002_hw_configpcipowersave()270 val |= AR_WA_D3_L1_DISABLE; in ar9002_hw_configpcipowersave()272 if (AR9280_WA_DEFAULT & AR_WA_D3_L1_DISABLE) in ar9002_hw_configpcipowersave()273 val |= AR_WA_D3_L1_DISABLE; in ar9002_hw_configpcipowersave()295 val &= (~AR_WA_D3_L1_DISABLE); in ar9002_hw_configpcipowersave()299 val &= (~AR_WA_D3_L1_DISABLE); in ar9002_hw_configpcipowersave()306 val &= (~AR_WA_D3_L1_DISABLE); in ar9002_hw_configpcipowersave()
608 ah->WARegVal |= (AR_WA_D3_L1_DISABLE | in __ath9k_hw_init()2097 REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); in ath9k_set_power_sleep()2141 REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); in ath9k_set_power_network_sleep()
696 #define AR_WA_D3_L1_DISABLE (1 << 14) macro