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Searched refs:A_PL_INT_ENABLE0 (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb3/
Dt3_hw.c1999 t3_write_reg(adapter, A_PL_INT_ENABLE0, adapter->slow_intr_mask); in t3_intr_enable()
2000 t3_read_reg(adapter, A_PL_INT_ENABLE0); /* flush */ in t3_intr_enable()
2012 t3_write_reg(adapter, A_PL_INT_ENABLE0, 0); in t3_intr_disable()
2013 t3_read_reg(adapter, A_PL_INT_ENABLE0); /* flush */ in t3_intr_disable()
Dcxgb3_main.c2853 t3_write_reg(adapter, A_PL_INT_ENABLE0, in ext_intr_task()
2873 t3_write_reg(adapter, A_PL_INT_ENABLE0, in t3_os_ext_intr_handler()
Dregs.h1895 #define A_PL_INT_ENABLE0 0x6e0 macro