Searched refs:BIT12 (Results 1 – 10 of 10) sorted by relevance
79 #define BIT12 0x00001000 macro128 #define UFRAME (BIT14+BIT13+BIT12)159 #define EP4_INT BIT12186 #define EP4_EN BIT12227 #define EP0_OUT_EMPTY BIT12369 #define MCYCLE_RST BIT12 /* RW */405 #define DIRPD BIT12 /* RW */
140 #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \154 #define RCR_AICV BIT12226 #define IMR_RXFOVW BIT12253 #define TPPoll_StopVO BIT12383 #define RRSR_MCS0 BIT12
60 #define BIT12 0x00001000 macro
30 #define BIT12 0x00001000 macro
63 #define BIT12 0x00001000 macro
561 #define MISCSTATUS_TXC BIT12582 #define SICR_TXC_INACTIVE BIT12583 #define SICR_TXC (BIT13|BIT12)1847 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12)); in shutdown()4687 (unsigned short)((usc_InReg(info, IOCR) & ~(BIT13|BIT12)) | BIT12)); in usc_set_sdlc_mode()4721 RegValue |= BIT12; in usc_set_sdlc_mode()4763 RegValue |= ( BIT12 | BIT10 | BIT9 ); in usc_set_sdlc_mode()4838 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8); in usc_set_sdlc_mode()5169 case HDLC_PREAMBLE_PATTERN_FLAGS: RegValue |= BIT8 | BIT12; break; in usc_set_sdlc_mode()6044 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) & ~BIT12)); in usc_set_async_mode()[all …]
414 #define IRQ_TXIDLE BIT124306 case HDLC_ENCODING_BIPHASE_MARK: val |= BIT12; break; in sync_mode()4307 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break; in sync_mode()4308 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break; in sync_mode()4309 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()4379 case HDLC_ENCODING_BIPHASE_MARK: val |= BIT12; break; in sync_mode()4380 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break; in sync_mode()4381 case HDLC_ENCODING_BIPHASE_LEVEL: val |= BIT12 + BIT11; break; in sync_mode()4382 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
396 #define RRSR_MCS0 BIT12
686 #define LPFC_SLI4_INTR12 BIT12
293 #define IRQ_UNDERRUN BIT12 // transmit data underrun