Searched refs:BIT13 (Results 1 – 10 of 10) sorted by relevance
80 #define BIT13 0x00002000 macro128 #define UFRAME (BIT14+BIT13+BIT12)158 #define EP5_INT BIT13185 #define EP5_EN BIT13226 #define EP0_OUT_FULL BIT13388 #define AHB_VBUS_INT BIT13 /* RW */398 #define VBUS_INTEN BIT13 /* RW */
153 #define RCR_RXFTH BIT13225 #define IMR_BcnInt BIT13254 #define TPPoll_StopMgt BIT13384 #define RRSR_MCS1 BIT13
61 #define BIT13 0x00002000 macro
560 #define MISCSTATUS_TXC_LATCHED BIT13581 #define SICR_TXC_ACTIVE BIT13583 #define SICR_TXC (BIT13|BIT12)1176 info->cmr_value &= ~BIT13; in mgsl_isr_receive_status()1847 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12)); in shutdown()4687 (unsigned short)((usc_InReg(info, IOCR) & ~(BIT13|BIT12)) | BIT12)); in usc_set_sdlc_mode()4716 RegValue |= BIT13; in usc_set_sdlc_mode()4751 case HDLC_ENCODING_NRZB: RegValue |= BIT13; break; in usc_set_sdlc_mode()4753 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT14 | BIT13; break; in usc_set_sdlc_mode()4755 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 | BIT13; break; in usc_set_sdlc_mode()[all …]
413 #define IRQ_TXDATA BIT134292 val |= BIT15 + BIT13; in sync_mode()4294 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()4296 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()4367 val |= BIT15 + BIT13; in sync_mode()4369 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()4371 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()
31 #define BIT13 0x00002000 macro
62 #define BIT13 0x00002000 macro
397 #define RRSR_MCS1 BIT13
687 #define LPFC_SLI4_INTR13 BIT13
292 #define IRQ_ALLSENT BIT13 // all sent