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Searched refs:BUS_AND_STATUS_REG (Results 1 – 5 of 5) sorted by relevance

/drivers/scsi/
Dmac_scsi.c246 while (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ) && in macscsi_pread()
250 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ) && in macscsi_pread()
251 (NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH)) { in macscsi_pread()
340 while (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ) && in macscsi_pwrite()
342 (NCR5380_read(BUS_AND_STATUS_REG) & BASR_PHASE_MATCH))) in macscsi_pwrite()
345 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ)) { in macscsi_pwrite()
DNCR5380.c417 basr = NCR5380_read(BUS_AND_STATUS_REG); in NCR5380_print()
1118 basr = NCR5380_read(BUS_AND_STATUS_REG); in NCR5380_intr()
1155 NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, BASR_ACK, 0, 2*HZ); in NCR5380_intr()
1796 tmp = NCR5380_read(BUS_AND_STATUS_REG); in NCR5380_transfer_dma()
1838 …if (((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == (BASR_PHASE_MATCH | BAS… in NCR5380_transfer_dma()
1845 …while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ… in NCR5380_transfer_dma()
1920 while (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ)); in NCR5380_transfer_dma()
1940 …while (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ) && (NCR5380_read(BUS_AND_STATUS_REG) & BASR_… in NCR5380_transfer_dma()
1965 if (NCR5380_read(BUS_AND_STATUS_REG) & BASR_IRQ) { in NCR5380_transfer_dma()
2544 NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, BASR_ACK, 0, 5*HZ);
[all …]
Dg_NCR5380.c591 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) in NCR5380_pread()
679 if (!((i = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_END_DMA_TRANSFER)) in NCR5380_pwrite()
685 if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) { in NCR5380_pwrite()
Datari_NCR5380.c521 basr = NCR5380_read(BUS_AND_STATUS_REG); in NCR5380_print()
1124 if ((NCR5380_read(BUS_AND_STATUS_REG) & in NCR5380_dma_complete()
1135 HOSTNO, NCR5380_read(BUS_AND_STATUS_REG), in NCR5380_dma_complete()
1146 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == in NCR5380_dma_complete()
1149 NCR5380_read(BUS_AND_STATUS_REG)); in NCR5380_dma_complete()
1208 basr = NCR5380_read(BUS_AND_STATUS_REG); in NCR5380_intr()
2685 NCR5380_read(BUS_AND_STATUS_REG), in NCR5380_abort()
DNCR5380.h133 #define BUS_AND_STATUS_REG 5 /* ro */ macro