Home
last modified time | relevance | path

Searched refs:CG_DISPLAY_GAP_CNTL (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Drv6xxd.h130 #define CG_DISPLAY_GAP_CNTL 0x7dc macro
Dcypress_dpm.c1730 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in cypress_enable_display_gap()
1739 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in cypress_enable_display_gap()
1747 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in cypress_program_display_gap()
1758 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in cypress_program_display_gap()
Drv770_dpm.c880 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in rv770_enable_display_gap()
885 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in rv770_enable_display_gap()
1344 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in rv770_program_display_gap()
1357 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in rv770_program_display_gap()
Drv6xx_dpm.c990 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in rv6xx_enable_display_gap()
1183 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in rv6xx_program_display_gap()
1196 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in rv6xx_program_display_gap()
Drv770d.h255 #define CG_DISPLAY_GAP_CNTL 0x714 macro
Dsid.h301 #define CG_DISPLAY_GAP_CNTL 0x828 macro
Dcikd.h131 #define CG_DISPLAY_GAP_CNTL 0xC0200060 macro
Dsi_dpm.c3737 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in si_program_display_gap()
3748 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in si_program_display_gap()
3851 u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); in si_enable_display_gap()
3860 WREG32(CG_DISPLAY_GAP_CNTL, tmp); in si_enable_display_gap()
Dci_dpm.c1963 u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL); in ci_program_display_gap()
1975 WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp); in ci_program_display_gap()
2024 u32 tmp = RREG32_SMC(CG_DISPLAY_GAP_CNTL); in ci_enable_display_gap()
2030 WREG32_SMC(CG_DISPLAY_GAP_CNTL, tmp); in ci_enable_display_gap()
Devergreend.h193 #define CG_DISPLAY_GAP_CNTL 0x714 macro