Searched refs:CLR_BIT (Results 1 – 5 of 5) sorted by relevance
| /drivers/scsi/sym53c8xx_2/ |
| D | sym_nvram.c | 249 #define CLR_BIT 1 macro
264 case CLR_BIT: in S24C16_set_bit()
287 S24C16_set_bit(np, 0, gpreg, CLR_BIT); in S24C16_start()
312 S24C16_set_bit(np, 0, gpreg, CLR_BIT); in S24C16_do_bit()
397 S24C16_set_bit(np, 0, &gpreg, CLR_BIT); in sym_write_S24C16_nvram()
451 S24C16_set_bit(np, 0, &gpreg, CLR_BIT); in sym_read_S24C16_nvram()
502 #undef CLR_BIT
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| /drivers/usb/storage/ |
| D | realtek_cr.c | 132 #define CLR_BIT(data, idx) ((data) &= ~(1 << (idx))) macro
580 CLR_BIT(value, 0); in config_autodelink_after_power_on()
581 CLR_BIT(value, 1); in config_autodelink_after_power_on()
585 CLR_BIT(value, 2); in config_autodelink_after_power_on()
603 CLR_BIT(value, 2); in config_autodelink_after_power_on()
607 CLR_BIT(value, 0); in config_autodelink_after_power_on()
608 CLR_BIT(value, 7); in config_autodelink_after_power_on()
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| /drivers/crypto/qat/qat_common/ |
| D | qat_hal.c | 195 #define CLR_BIT(wrd, bit) (wrd & ~(1 << bit)) macro
213 CLR_BIT(csr, CE_INUSE_CONTEXTS_BITPOS); in qat_hal_set_ae_ctx_mode()
228 CLR_BIT(csr, CE_NN_MODE_BITPOS); in qat_hal_set_ae_nn_mode()
248 CLR_BIT(csr, CE_LMADDR_0_GLOBAL_BITPOS); in qat_hal_set_ae_lm_mode()
253 CLR_BIT(csr, CE_LMADDR_1_GLOBAL_BITPOS); in qat_hal_set_ae_lm_mode()
897 newcsr_val = CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS); in qat_hal_exec_micro_inst()
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| /drivers/staging/rts5208/ |
| D | rtsx_card.c | 574 CLR_BIT(chip->lun_mc, chip->card2lun[SD_CARD]); in rtsx_init_cards()
587 CLR_BIT(chip->lun_mc, chip->card2lun[XD_CARD]); in rtsx_init_cards()
603 CLR_BIT(chip->lun_mc, chip->card2lun[MS_CARD]); in rtsx_init_cards()
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| D | rtsx_chip.h | 338 #define CLR_BIT(data, idx) ((data) &= ~(1 << (idx))) macro
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