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Searched refs:CP_HQD_PQ_DOORBELL_CONTROL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_kfd.c538 write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL, in kgd_hqd_load()
644 write_register(kgd, CP_HQD_PQ_DOORBELL_CONTROL, 0); in kgd_hqd_destroy()
Dcikd.h1513 #define CP_HQD_PQ_DOORBELL_CONTROL 0xC950 macro
Dcik.c5002 RREG32(CP_HQD_PQ_DOORBELL_CONTROL); in cik_cp_compute_resume()
5007 WREG32(CP_HQD_PQ_DOORBELL_CONTROL, in cik_cp_compute_resume()
5088 RREG32(CP_HQD_PQ_DOORBELL_CONTROL); in cik_cp_compute_resume()
5099 WREG32(CP_HQD_PQ_DOORBELL_CONTROL, in cik_cp_compute_resume()
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v8_0.c3830 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in gfx_v8_0_cp_compute_resume()
3832 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 0); in gfx_v8_0_cp_compute_resume()
3917 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, in gfx_v8_0_cp_compute_resume()
3919 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); in gfx_v8_0_cp_compute_resume()
3920 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0); in gfx_v8_0_cp_compute_resume()
3921 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0); in gfx_v8_0_cp_compute_resume()