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Searched refs:CP_ME1_PIPE3_INT_CNTL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/radeon/
Dcikd.h1363 #define CP_ME1_PIPE3_INT_CNTL 0xC220 macro
Dcik.c7289 WREG32(CP_ME1_PIPE3_INT_CNTL, 0); in cik_disable_interrupt_state()