| /drivers/scsi/aacraid/ |
| D | aacraid.h | 719 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) argument
720 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) argument
721 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) argument
722 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) argument
781 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) argument
782 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) argument
783 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) argument
784 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR)) argument
799 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR)) argument
800 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR)) argument
[all …]
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| /drivers/dma/ |
| D | txx9dmac.c | 299 channel64_readl(dc, CSR)); in txx9dmac_dump_regs()
311 channel32_readl(dc, CSR)); in txx9dmac_dump_regs()
343 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_dostart()
353 channel64_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
374 channel32_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
487 desc->SAIR, desc->DAIR, desc->CCR, desc->CSR); in txx9dmac_dump_desc()
500 d->SAIR, d->DAIR, d->CCR, d->CSR); in txx9dmac_dump_desc()
526 channel_writel(dc, CSR, errors); in txx9dmac_handle_error()
552 csr = channel64_readl(dc, CSR); in txx9dmac_scan_descriptors()
553 channel64_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
[all …]
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| D | txx9dmac.h | 81 TXX9_DMA_REG32(CSR); /* Channel Status Register */
91 u32 CSR; member
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| D | omap-dma.c | 261 omap_dma_chan_read(c, CSR); in omap_dma_clear_csr()
263 omap_dma_chan_write(c, CSR, ~0); in omap_dma_clear_csr()
268 unsigned val = omap_dma_chan_read(c, CSR); in omap_dma_get_csr()
271 omap_dma_chan_write(c, CSR, val); in omap_dma_get_csr()
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| D | Kconfig | 421 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
425 Enable support for the CSR SiRFprimaII DMA engine.
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| /drivers/net/ethernet/qlogic/qlge/ |
| D | qlge_mpi.c | 8 tmp = ql_read32(qdev, CSR); in ql_unpause_mpi_risc()
12 ql_write32(qdev, CSR, CSR_CMD_CLR_PAUSE); in ql_unpause_mpi_risc()
22 ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE); in ql_pause_mpi_risc()
24 tmp = ql_read32(qdev, CSR); in ql_pause_mpi_risc()
39 ql_write32(qdev, CSR, CSR_CMD_SET_RST); in ql_hard_reset_mpi_risc()
41 tmp = ql_read32(qdev, CSR); in ql_hard_reset_mpi_risc()
43 ql_write32(qdev, CSR, CSR_CMD_CLR_RST); in ql_hard_reset_mpi_risc()
174 if (ql_read32(qdev, CSR) & CSR_HRI) in ql_exec_mb_cmd()
193 ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT); in ql_exec_mb_cmd()
516 ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT); in ql_mpi_handler()
[all …]
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| D | qlge.h | 803 CSR = 0x14, enumerator
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| D | qlge_dbg.c | 1489 DUMP_REG(qdev, CSR); in ql_dump_regs()
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| /drivers/regulator/ |
| D | bcm590xx-regulator.c | 299 BCM590XX_MATCH(csr, CSR),
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| /drivers/pinctrl/ |
| D | Kconfig | 150 bool "CSR SiRFprimaII pin controller driver"
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| /drivers/net/ethernet/renesas/ |
| D | ravb.h | 55 CSR = 0x000C, enumerator
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| D | ravb_main.c | 63 error = ravb_wait(ndev, CSR, CSR_OPS, CSR_OPS_CONFIG); in ravb_config()
650 error = ravb_wait(ndev, CSR, CSR_TPO0 | CSR_TPO1 | CSR_TPO2 | CSR_TPO3, in ravb_stop_dma()
659 error = ravb_wait(ndev, CSR, CSR_RPO, 0); in ravb_stop_dma()
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| /drivers/mmc/host/ |
| D | Kconfig | 228 tristate "SDHCI support on CSR SiRFprimaII and SiRFmarco SoCs"
728 the Cypress Astoria chip with firmware compliant with CSR's
731 CSR boards with this device include: USB<>SDIO (M1985v2),
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| /drivers/spi/ |
| D | Kconfig | 528 tristate "CSR SiRFprimaII SPI controller"
532 SPI driver for CSR SiRFprimaII SoCs
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| /drivers/bluetooth/ |
| D | Kconfig | 96 USB Bluetooth devices based on CSR BlueCore chip, including PCMCIA and
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| /drivers/i2c/busses/ |
| D | Kconfig | 856 tristate "CSR SiRFprimaII I2C interface"
860 CSR SiRFprimaII I2C interface.
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| /drivers/input/misc/ |
| D | Kconfig | 752 bool "CSR SiRFSoC power on/off/suspend key support"
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| /drivers/tty/serial/ |
| D | Kconfig | 297 Support for the on-chip UART on the CSR SiRFprimaII series,
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| /drivers/watchdog/ |
| D | Kconfig | 501 Support for CSR SiRFprimaII and SiRFatlasVI watchdog. When
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