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Searched refs:CSR0_STOP (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/amd/
Dsun3lance.c213 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
333 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; in lance_probe()
335 if(ioaddr_probe[0] != CSR0_STOP) { in lance_probe()
360 REGA(CSR0) = CSR0_STOP; in lance_probe()
425 REGA(CSR0) = CSR0_STOP; in lance_open()
439 DREG = CSR0_STOP; in lance_open()
534 DREG = CSR0_STOP; in lance_start_xmit()
591 REGA( CSR0 ) = CSR0_STOP; in lance_start_xmit()
719 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
757 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
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Datarilance.c314 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
511 ioaddr[0] = CSR0_INIT | CSR0_STOP; in lance_probe1()
512 if (ioaddr[0] != CSR0_STOP) { in lance_probe1()
518 ioaddr[0] = CSR0_STOP; in lance_probe1()
519 if (ioaddr[0] != CSR0_STOP) { in lance_probe1()
539 REGA( CSR0 ) = CSR0_STOP; in lance_probe1()
666 DREG = CSR0_STOP; in lance_open()
739 DREG = CSR0_STOP; in lance_tx_timeout()
874 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP | in lance_interrupt()
1064 DREG = CSR0_STOP; in lance_close()
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Dam79c961a.c247 …rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP); in am79c961_init_for_open()
299 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_init_for_open()
368 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_close()
389 stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP; in am79c961_setmulticastlist()
642 write_rreg (dev->base_addr, CSR0, CSR0_STOP); in am79c961_hw_init()
Dni65.h32 #define CSR0_STOP 0x0004 /* Stop (RS) */ macro
Dam79c961a.h33 #define CSR0_STOP 0x0004 macro
Dpcnet32.c199 #define CSR0_STOP 0x4 macro
797 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_set_ringparam()
893 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ in pcnet32_loopback_test()
907 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
980 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */ in pcnet32_loopback_test()
1394 if (!(csr0 & CSR0_STOP)) /* If not stopped */ in pcnet32_get_regs()
1431 if (!(csr0 & CSR0_STOP)) { /* If not stopped */ in pcnet32_get_regs()
2375 if (lp->a->read_csr(ioaddr, CSR0) & CSR0_STOP) in pcnet32_restart()
2406 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_tx_timeout()
2585 lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); in pcnet32_close()
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Dni65.c273 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */ in ni65_set_performance()
577 writereg(CSR0_CLRALL|CSR0_STOP,CSR0); in ni65_init_lance()
728 writedatareg(CSR0_STOP); in ni65_stop_start()