Searched refs:DISABLE_MEM_PWR_CTRL (Results 1 – 15 of 15) sorted by relevance
/drivers/gpu/drm/amd/include/asic_reg/bif/ |
D | bif_5_1_enum.h | 1056 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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D | bif_5_0_enum.h | 1186 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
D | gmc_8_2_enum.h | 1056 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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D | gmc_8_1_enum.h | 1186 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/smu/ |
D | smu_8_0_enum.h | 1056 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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D | smu_7_1_3_enum.h | 1270 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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D | smu_7_1_2_enum.h | 1234 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
D | uvd_6_0_enum.h | 1069 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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D | uvd_5_0_enum.h | 1199 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_3_0_enum.h | 1485 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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D | oss_3_0_1_enum.h | 1452 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/dce/ |
D | dce_10_0_enum.h | 1761 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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D | dce_11_0_enum.h | 5628 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_8_0_enum.h | 6846 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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D | gfx_8_1_enum.h | 6796 DISABLE_MEM_PWR_CTRL = 0x1, enumerator
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