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Searched refs:DMA_CNTL (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/radeon/
Dni_dma.c239 dma_cntl = RREG32(DMA_CNTL + reg_offset); in cayman_dma_resume()
241 WREG32(DMA_CNTL + reg_offset, dma_cntl); in cayman_dma_resume()
Dr600_dma.c160 dma_cntl = RREG32(DMA_CNTL); in r600_dma_resume()
162 WREG32(DMA_CNTL, dma_cntl); in r600_dma_resume()
Dsi.c5944 tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5945 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, tmp); in si_disable_interrupt_state()
5946 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5947 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp); in si_disable_interrupt_state()
6099 dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6100 dma_cntl1 = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6186 WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, dma_cntl); in si_irq_set()
6187 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, dma_cntl1); in si_irq_set()
Dnid.h1322 #define DMA_CNTL 0xd02c macro
Dr600.c3577 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_disable_interrupt_state()
3578 WREG32(DMA_CNTL, tmp); in r600_disable_interrupt_state()
3759 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_irq_set()
3828 WREG32(DMA_CNTL, dma_cntl); in r600_irq_set()
Dsid.h1831 #define DMA_CNTL 0xd02c macro
Devergreen.c4554 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4555 WREG32(DMA_CNTL, tmp); in evergreen_disable_interrupt_state()
4643 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4771 WREG32(DMA_CNTL, dma_cntl); in evergreen_irq_set()
Devergreend.h1404 #define DMA_CNTL 0xd02c macro
Dr600d.h631 #define DMA_CNTL 0xd02c macro