Searched refs:DMA_CONTROL (Results 1 – 6 of 6) sorted by relevance
| /drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac_lib.c | 47 u32 value = readl(ioaddr + DMA_CONTROL); in dwmac_dma_start_tx()
49 writel(value, ioaddr + DMA_CONTROL); in dwmac_dma_start_tx()
54 u32 value = readl(ioaddr + DMA_CONTROL); in dwmac_dma_stop_tx()
56 writel(value, ioaddr + DMA_CONTROL); in dwmac_dma_stop_tx()
61 u32 value = readl(ioaddr + DMA_CONTROL); in dwmac_dma_start_rx()
63 writel(value, ioaddr + DMA_CONTROL); in dwmac_dma_start_rx()
68 u32 value = readl(ioaddr + DMA_CONTROL); in dwmac_dma_stop_rx()
70 writel(value, ioaddr + DMA_CONTROL); in dwmac_dma_stop_rx()
216 u32 csr6 = readl(ioaddr + DMA_CONTROL); in dwmac_dma_flush_tx_fifo()
217 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL); in dwmac_dma_flush_tx_fifo()
[all …]
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| D | dwmac100_dma.c | 77 u32 csr6 = readl(ioaddr + DMA_CONTROL); in dwmac100_dma_operation_mode()
86 writel(csr6, ioaddr + DMA_CONTROL); in dwmac100_dma_operation_mode()
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| D | dwmac1000_dma.c | 133 u32 csr6 = readl(ioaddr + DMA_CONTROL); in dwmac1000_dma_operation_mode()
180 writel(csr6, ioaddr + DMA_CONTROL); in dwmac1000_dma_operation_mode()
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| D | dwmac_dma.h | 35 #define DMA_CONTROL 0x00001018 /* Ctrl (Operational Mode) */ macro
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| /drivers/media/pci/ddbridge/ |
| D | ddbridge-regs.h | 120 #define DMA_CONTROL (0x00) /* 64 */ macro
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| /drivers/memstick/host/ |
| D | jmb38x_ms.c | 30 DMA_CONTROL = 0x08, enumerator
435 writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL); in jmb38x_ms_issue_cmd()
487 writel(0, host->addr + DMA_CONTROL); in jmb38x_ms_complete_cmd()
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