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Searched refs:DPIO_CH1 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_runtime_pm.c1012 PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) | in assert_chv_phy_status()
1013 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) | in assert_chv_phy_status()
1014 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1)); in assert_chv_phy_status()
1028 if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1)) == 0) in assert_chv_phy_status()
1029 phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1); in assert_chv_phy_status()
1034 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1043 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) && in assert_chv_phy_status()
1045 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1); in assert_chv_phy_status()
1055 PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1056 phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0); in assert_chv_phy_status()
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Dintel_hdmi.c1682 !chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true); in chv_hdmi_pre_pll_enable()
1697 if (ch == DPIO_CH1) in chv_hdmi_pre_pll_enable()
1705 if (ch == DPIO_CH1) in chv_hdmi_pre_pll_enable()
1956 chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false); in chv_hdmi_pre_enable()
Dintel_drv.h818 return DPIO_CH1; in vlv_dport_to_channel()
846 return DPIO_CH1; in vlv_pipe_to_channel()
Dintel_dp.c2890 chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, false); in chv_pre_enable_dp()
2916 !chv_phy_powergate_ch(dev_priv, DPIO_PHY0, DPIO_CH1, true); in chv_dp_pre_pll_enable()
2931 if (ch == DPIO_CH1) in chv_dp_pre_pll_enable()
2939 if (ch == DPIO_CH1) in chv_dp_pre_pll_enable()
Di915_drv.h164 DPIO_CH1 enumerator