Searched refs:DSPFW1 (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/gma500/ |
| D | psb_device.c | 189 regs->saveDSPFW1 = PSB_RVDC32(DSPFW1); in psb_save_display_registers()
227 PSB_WVDC32(regs->saveDSPFW1, DSPFW1); in psb_restore_display_registers()
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| D | cdv_intel_display.c | 509 fw = REG_READ(DSPFW1); in cdv_update_wm()
514 REG_WRITE(DSPFW1, fw); in cdv_update_wm()
551 REG_WRITE(DSPFW1, 0x3f880808); in cdv_update_wm()
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| D | oaktrail_device.c | 199 regs->psb.saveDSPFW1 = PSB_RVDC32(DSPFW1); in oaktrail_save_display_registers()
313 PSB_WVDC32(regs->psb.saveDSPFW1, DSPFW1); in oaktrail_restore_display_registers()
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| D | cdv_device.c | 278 regs->cdv.saveDSPFW[0] = REG_READ(DSPFW1); in cdv_save_display_registers()
348 REG_WRITE(DSPFW1, regs->cdv.saveDSPFW[0]); in cdv_restore_display_registers()
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| D | oaktrail_crtc.c | 339 REG_WRITE(DSPFW1, 0x3f8f0404); in oaktrail_crtc_dpms()
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| D | psb_intel_reg.h | 614 #define DSPFW1 0x70034 macro
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| /drivers/gpu/drm/i915/ |
| D | intel_pm.c | 648 reg = I915_READ(DSPFW1); in pineview_update_wm()
651 I915_WRITE(DSPFW1, reg); in pineview_update_wm()
839 I915_WRITE(DSPFW1, in vlv_write_wm_values()
892 POSTING_READ(DSPFW1); in vlv_write_wm_values()
1405 I915_WRITE(DSPFW1, in g4x_update_wm()
1481 I915_WRITE(DSPFW1, FW_WM(srwm, SR) | in i965_update_wm()
3952 tmp = I915_READ(DSPFW1); in vlv_read_wm_values()
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| D | i915_reg.h | 4586 #define DSPFW1 (dev_priv->info.display_mmio_offset + 0x70034) macro
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