| /drivers/gpu/drm/exynos/ |
| D | exynos_hdmi.c | 590 #define DUMPREG(reg_id) \ in hdmi_v13_regs_dump() macro
594 DUMPREG(HDMI_INTC_FLAG); in hdmi_v13_regs_dump()
595 DUMPREG(HDMI_INTC_CON); in hdmi_v13_regs_dump()
596 DUMPREG(HDMI_HPD_STATUS); in hdmi_v13_regs_dump()
597 DUMPREG(HDMI_V13_PHY_RSTOUT); in hdmi_v13_regs_dump()
598 DUMPREG(HDMI_V13_PHY_VPLL); in hdmi_v13_regs_dump()
599 DUMPREG(HDMI_V13_PHY_CMU); in hdmi_v13_regs_dump()
600 DUMPREG(HDMI_V13_CORE_RSTOUT); in hdmi_v13_regs_dump()
603 DUMPREG(HDMI_CON_0); in hdmi_v13_regs_dump()
604 DUMPREG(HDMI_CON_1); in hdmi_v13_regs_dump()
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| D | exynos_mixer.c | 185 #define DUMPREG(reg_id) \ in mixer_regs_dump() macro
191 DUMPREG(MXR_STATUS); in mixer_regs_dump()
192 DUMPREG(MXR_CFG); in mixer_regs_dump()
193 DUMPREG(MXR_INT_EN); in mixer_regs_dump()
194 DUMPREG(MXR_INT_STATUS); in mixer_regs_dump()
196 DUMPREG(MXR_LAYER_CFG); in mixer_regs_dump()
197 DUMPREG(MXR_VIDEO_CFG); in mixer_regs_dump()
199 DUMPREG(MXR_GRAPHIC0_CFG); in mixer_regs_dump()
200 DUMPREG(MXR_GRAPHIC0_BASE); in mixer_regs_dump()
201 DUMPREG(MXR_GRAPHIC0_SPAN); in mixer_regs_dump()
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| /drivers/media/platform/s5p-tv/ |
| D | mixer_reg.c | 480 #define DUMPREG(reg_id) \ in mxr_reg_mxr_dump() macro
486 DUMPREG(MXR_STATUS); in mxr_reg_mxr_dump()
487 DUMPREG(MXR_CFG); in mxr_reg_mxr_dump()
488 DUMPREG(MXR_INT_EN); in mxr_reg_mxr_dump()
489 DUMPREG(MXR_INT_STATUS); in mxr_reg_mxr_dump()
491 DUMPREG(MXR_LAYER_CFG); in mxr_reg_mxr_dump()
492 DUMPREG(MXR_VIDEO_CFG); in mxr_reg_mxr_dump()
494 DUMPREG(MXR_GRAPHIC0_CFG); in mxr_reg_mxr_dump()
495 DUMPREG(MXR_GRAPHIC0_BASE); in mxr_reg_mxr_dump()
496 DUMPREG(MXR_GRAPHIC0_SPAN); in mxr_reg_mxr_dump()
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| D | hdmi_drv.c | 294 #define DUMPREG(reg_id) \ in hdmi_dumpregs() macro
299 DUMPREG(HDMI_INTC_FLAG); in hdmi_dumpregs()
300 DUMPREG(HDMI_INTC_CON); in hdmi_dumpregs()
301 DUMPREG(HDMI_HPD_STATUS); in hdmi_dumpregs()
302 DUMPREG(HDMI_PHY_RSTOUT); in hdmi_dumpregs()
303 DUMPREG(HDMI_PHY_VPLL); in hdmi_dumpregs()
304 DUMPREG(HDMI_PHY_CMU); in hdmi_dumpregs()
305 DUMPREG(HDMI_CORE_RSTOUT); in hdmi_dumpregs()
308 DUMPREG(HDMI_CON_0); in hdmi_dumpregs()
309 DUMPREG(HDMI_CON_1); in hdmi_dumpregs()
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| /drivers/media/platform/ti-vpe/ |
| D | sc.c | 27 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in sc_dump_regs() macro
30 DUMPREG(SC0); in sc_dump_regs()
31 DUMPREG(SC1); in sc_dump_regs()
32 DUMPREG(SC2); in sc_dump_regs()
33 DUMPREG(SC3); in sc_dump_regs()
34 DUMPREG(SC4); in sc_dump_regs()
35 DUMPREG(SC5); in sc_dump_regs()
36 DUMPREG(SC6); in sc_dump_regs()
37 DUMPREG(SC8); in sc_dump_regs()
38 DUMPREG(SC9); in sc_dump_regs()
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| D | vpdma.c | 273 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, read_reg(vpdma, VPDMA_##r)) in vpdma_dump_regs() macro
277 DUMPREG(PID); in vpdma_dump_regs()
278 DUMPREG(LIST_ADDR); in vpdma_dump_regs()
279 DUMPREG(LIST_ATTR); in vpdma_dump_regs()
280 DUMPREG(LIST_STAT_SYNC); in vpdma_dump_regs()
281 DUMPREG(BG_RGB); in vpdma_dump_regs()
282 DUMPREG(BG_YUV); in vpdma_dump_regs()
283 DUMPREG(SETUP); in vpdma_dump_regs()
284 DUMPREG(MAX_SIZE1); in vpdma_dump_regs()
285 DUMPREG(MAX_SIZE2); in vpdma_dump_regs()
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| D | csc.c | 96 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in csc_dump_regs() macro
99 DUMPREG(CSC00); in csc_dump_regs()
100 DUMPREG(CSC01); in csc_dump_regs()
101 DUMPREG(CSC02); in csc_dump_regs()
102 DUMPREG(CSC03); in csc_dump_regs()
103 DUMPREG(CSC04); in csc_dump_regs()
104 DUMPREG(CSC05); in csc_dump_regs()
106 #undef DUMPREG in csc_dump_regs()
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| D | vpe.c | 931 #define DUMPREG(r) vpe_dbg(dev, "%-35s %08x\n", #r, read_reg(dev, VPE_##r)) in vpe_dump_regs() macro
935 DUMPREG(PID); in vpe_dump_regs()
936 DUMPREG(SYSCONFIG); in vpe_dump_regs()
937 DUMPREG(INT0_STATUS0_RAW); in vpe_dump_regs()
938 DUMPREG(INT0_STATUS0); in vpe_dump_regs()
939 DUMPREG(INT0_ENABLE0); in vpe_dump_regs()
940 DUMPREG(INT0_STATUS1_RAW); in vpe_dump_regs()
941 DUMPREG(INT0_STATUS1); in vpe_dump_regs()
942 DUMPREG(INT0_ENABLE1); in vpe_dump_regs()
943 DUMPREG(CLK_ENABLE); in vpe_dump_regs()
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| /drivers/video/fbdev/omap2/dss/ |
| D | venc.c | 671 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, venc_read_reg(r)) in venc_dump_regs() macro
676 DUMPREG(VENC_F_CONTROL); in venc_dump_regs()
677 DUMPREG(VENC_VIDOUT_CTRL); in venc_dump_regs()
678 DUMPREG(VENC_SYNC_CTRL); in venc_dump_regs()
679 DUMPREG(VENC_LLEN); in venc_dump_regs()
680 DUMPREG(VENC_FLENS); in venc_dump_regs()
681 DUMPREG(VENC_HFLTR_CTRL); in venc_dump_regs()
682 DUMPREG(VENC_CC_CARR_WSS_CARR); in venc_dump_regs()
683 DUMPREG(VENC_C_PHASE); in venc_dump_regs()
684 DUMPREG(VENC_GAIN_U); in venc_dump_regs()
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| D | hdmi_wp.c | 24 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump() macro
26 DUMPREG(HDMI_WP_REVISION); in hdmi_wp_dump()
27 DUMPREG(HDMI_WP_SYSCONFIG); in hdmi_wp_dump()
28 DUMPREG(HDMI_WP_IRQSTATUS_RAW); in hdmi_wp_dump()
29 DUMPREG(HDMI_WP_IRQSTATUS); in hdmi_wp_dump()
30 DUMPREG(HDMI_WP_IRQENABLE_SET); in hdmi_wp_dump()
31 DUMPREG(HDMI_WP_IRQENABLE_CLR); in hdmi_wp_dump()
32 DUMPREG(HDMI_WP_IRQWAKEEN); in hdmi_wp_dump()
33 DUMPREG(HDMI_WP_PWR_CTRL); in hdmi_wp_dump()
34 DUMPREG(HDMI_WP_DEBOUNCE); in hdmi_wp_dump()
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| D | rfbi.c | 802 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r)) in rfbi_dump_regs() macro
807 DUMPREG(RFBI_REVISION); in rfbi_dump_regs()
808 DUMPREG(RFBI_SYSCONFIG); in rfbi_dump_regs()
809 DUMPREG(RFBI_SYSSTATUS); in rfbi_dump_regs()
810 DUMPREG(RFBI_CONTROL); in rfbi_dump_regs()
811 DUMPREG(RFBI_PIXEL_CNT); in rfbi_dump_regs()
812 DUMPREG(RFBI_LINE_NUMBER); in rfbi_dump_regs()
813 DUMPREG(RFBI_CMD); in rfbi_dump_regs()
814 DUMPREG(RFBI_PARAM); in rfbi_dump_regs()
815 DUMPREG(RFBI_DATA); in rfbi_dump_regs()
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| D | dispc.c | 3454 #define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r)) in dispc_dump_regs() macro
3460 DUMPREG(DISPC_REVISION); in dispc_dump_regs()
3461 DUMPREG(DISPC_SYSCONFIG); in dispc_dump_regs()
3462 DUMPREG(DISPC_SYSSTATUS); in dispc_dump_regs()
3463 DUMPREG(DISPC_IRQSTATUS); in dispc_dump_regs()
3464 DUMPREG(DISPC_IRQENABLE); in dispc_dump_regs()
3465 DUMPREG(DISPC_CONTROL); in dispc_dump_regs()
3466 DUMPREG(DISPC_CONFIG); in dispc_dump_regs()
3467 DUMPREG(DISPC_CAPABLE); in dispc_dump_regs()
3468 DUMPREG(DISPC_LINE_STATUS); in dispc_dump_regs()
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| D | dsi.c | 1662 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(dsidev, r)) in dsi_dump_dsidev_regs() macro
1668 DUMPREG(DSI_REVISION); in dsi_dump_dsidev_regs()
1669 DUMPREG(DSI_SYSCONFIG); in dsi_dump_dsidev_regs()
1670 DUMPREG(DSI_SYSSTATUS); in dsi_dump_dsidev_regs()
1671 DUMPREG(DSI_IRQSTATUS); in dsi_dump_dsidev_regs()
1672 DUMPREG(DSI_IRQENABLE); in dsi_dump_dsidev_regs()
1673 DUMPREG(DSI_CTRL); in dsi_dump_dsidev_regs()
1674 DUMPREG(DSI_COMPLEXIO_CFG1); in dsi_dump_dsidev_regs()
1675 DUMPREG(DSI_COMPLEXIO_IRQ_STATUS); in dsi_dump_dsidev_regs()
1676 DUMPREG(DSI_COMPLEXIO_IRQ_ENABLE); in dsi_dump_dsidev_regs()
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| D | dss.c | 384 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r)) in dss_dump_regs() macro
389 DUMPREG(DSS_REVISION); in dss_dump_regs()
390 DUMPREG(DSS_SYSCONFIG); in dss_dump_regs()
391 DUMPREG(DSS_SYSSTATUS); in dss_dump_regs()
392 DUMPREG(DSS_CONTROL); in dss_dump_regs()
396 DUMPREG(DSS_SDI_CONTROL); in dss_dump_regs()
397 DUMPREG(DSS_PLL_CONTROL); in dss_dump_regs()
398 DUMPREG(DSS_SDI_STATUS); in dss_dump_regs()
402 #undef DUMPREG in dss_dump_regs()
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