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Searched refs:EFX_MAX_CHANNELS (Results 1 – 9 of 9) sorted by relevance

/drivers/net/ethernet/sfc/
Dselftest.h38 int eventq_dma[EFX_MAX_CHANNELS];
39 int eventq_int[EFX_MAX_CHANNELS];
Dnet_driver.h60 #define EFX_MAX_CHANNELS 32U macro
61 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
70 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
74 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
944 struct efx_channel *channel[EFX_MAX_CHANNELS];
945 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
Dselftest.c171 unsigned int read_ptr[EFX_MAX_CHANNELS]; in efx_test_eventq_irq()
175 BUILD_BUG_ON(EFX_MAX_CHANNELS > BITS_PER_LONG); in efx_test_eventq_irq()
Dsiena.c264 efx->max_channels = EFX_MAX_CHANNELS; in siena_probe_nic()
265 efx->max_tx_channels = EFX_MAX_CHANNELS; in siena_probe_nic()
Defx.c771 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; in efx_realloc_channels()
1391 struct msix_entry xentries[EFX_MAX_CHANNELS]; in efx_probe_interrupts()
2865 for (i = 0; i < EFX_MAX_CHANNELS; i++) { in efx_init_struct()
2895 for (i = 0; i < EFX_MAX_CHANNELS; i++) in efx_fini_struct()
Dmcdi.c1758 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); in efx_mcdi_flush_rxqs()
1761 BUILD_BUG_ON(EFX_MAX_CHANNELS > in efx_mcdi_flush_rxqs()
Dfalcon.c461 BUILD_BUG_ON(FSF_AZ_NET_IVEC_INT_Q_WIDTH > EFX_MAX_CHANNELS); in falcon_legacy_interrupt_a1()
2373 EFX_MAX_CHANNELS); in falcon_probe_nic()
Dsiena_sriov.c1296 BUILD_BUG_ON(EFX_MAX_CHANNELS + 1 >= EFX_VI_BASE); in efx_siena_sriov_init()
Def10.c299 EFX_MAX_CHANNELS, in efx_ef10_probe()