Searched refs:EIR (Results 1 – 12 of 12) sorted by relevance
| /drivers/net/ethernet/microchip/ |
| D | encx24j600.c | 293 encx24j600_clr_bits(priv, EIR, LINKIF); in encx24j600_int_link_handler()
314 encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF); in encx24j600_tx_complete()
404 eir = encx24j600_read_reg(priv, EIR); in encx24j600_isr()
421 encx24j600_clr_bits(priv, EIR, RXABTIF); in encx24j600_isr()
515 encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF); in encx24j600_hw_init_tx()
555 pr_info(DRV_NAME " EIR: %04X\n", encx24j600_read_reg(priv, EIR)); in encx24j600_dump_config()
665 encx24j600_clr_bits(priv, EIR, (PCFULIF | RXABTIF | TXABTIF | TXIF | in encx24j600_hw_enable()
848 if (encx24j600_read_reg(priv, EIR) & TXABTIF) in encx24j600_hw_tx()
853 encx24j600_clr_bits(priv, EIR, TXIF); in encx24j600_hw_tx()
|
| D | enc28j60.c | 553 nolock_regb_read(priv, ESTAT), nolock_regb_read(priv, EIR), in enc28j60_dump_regs()
756 nolock_reg_bfclr(priv, EIR, EIR_DMAIF | EIR_LINKIF | in enc28j60_hw_enable()
922 nolock_reg_bfclr(priv, EIR, EIR_RXERIF); in enc28j60_hw_rx()
1129 intflags = locked_regb_read(priv, EIR); in enc28j60_irq_work_handler()
1136 locked_reg_bfclr(priv, EIR, EIR_DMAIF); in enc28j60_irq_work_handler()
1168 locked_reg_bfclr(priv, EIR, EIR_TXIF); in enc28j60_irq_work_handler()
1201 locked_reg_bfclr(priv, EIR, EIR_TXERIF); in enc28j60_irq_work_handler()
1216 locked_reg_bfclr(priv, EIR, EIR_RXERIF); in enc28j60_irq_work_handler()
|
| D | enc28j60_hw.h | 23 #define EIR 0x1C macro
|
| D | encx24j600_hw.h | 96 #define EIR 0x1C macro
|
| D | encx24j600-regmap.c | 328 case EIR: /* Can be modified via single byte cmds */ in encx24j600_regmap_volatile()
|
| /drivers/video/fbdev/i810/ |
| D | i810_regs.h | 48 #define EIR 0x020B0 macro
|
| D | i810_accel.c | 44 i810_readb(EIR, mmio), in i810_report_error()
|
| /drivers/net/irda/ |
| D | nsc-ircc.h | 96 #define EIR 0x02 /* (read only) */ macro
|
| D | nsc-ircc.c | 2101 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */ in nsc_ircc_interrupt()
|
| /drivers/gpu/drm/i915/ |
| D | i915_irq.c | 2471 u32 eir = I915_READ(EIR); in i915_report_and_clear_eir()
2545 I915_WRITE(EIR, eir); in i915_report_and_clear_eir()
2546 POSTING_READ(EIR); in i915_report_and_clear_eir()
2547 eir = I915_READ(EIR); in i915_report_and_clear_eir()
|
| D | i915_gpu_error.c | 1233 error->eir = I915_READ(EIR); in i915_capture_reg_state()
|
| D | i915_reg.h | 1763 #define EIR 0x020b0 macro
|