Home
last modified time | relevance | path

Searched refs:ENABLE_L1_FRAGMENT_PROCESSING (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgmc_v8_0.c591 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_FRAGMENT_PROCESSING, 1); in gmc_v8_0_gart_enable()
726 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_FRAGMENT_PROCESSING, 0); in gmc_v8_0_gart_disable()
Dgmc_v7_0.c529 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_FRAGMENT_PROCESSING, 1); in gmc_v7_0_gart_enable()
647 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_FRAGMENT_PROCESSING, 0); in gmc_v7_0_gart_disable()
/drivers/gpu/drm/radeon/
Drv770.c910 tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING | in rv770_pcie_gart_enable()
987 tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING | in rv770_agp_enable()
Drv770d.h465 #define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1) macro
Dni.c1293 ENABLE_L1_FRAGMENT_PROCESSING | in cayman_pcie_gart_enable()
1375 WREG32(MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_FRAGMENT_PROCESSING | in cayman_pcie_gart_disable()
Dnid.h180 #define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1) macro
Dsid.h476 #define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1) macro
Dcikd.h603 #define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1) macro
Devergreend.h956 #define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1) macro
Dr600d.h333 #define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1) macro
Dr600.c1141 tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING | in r600_pcie_gart_enable()
1233 tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING | in r600_agp_enable()
Devergreen.c2513 tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING | in evergreen_pcie_gart_enable()
2596 tmp = ENABLE_L1_TLB | ENABLE_L1_FRAGMENT_PROCESSING | in evergreen_agp_enable()
Dsi.c4292 ENABLE_L1_FRAGMENT_PROCESSING | in si_pcie_gart_enable()
Dcik.c5836 ENABLE_L1_FRAGMENT_PROCESSING | in cik_pcie_gart_enable()