Searched refs:ENABLE_MEM_PWR_CTRL (Results 1 – 15 of 15) sorted by relevance
/drivers/gpu/drm/amd/include/asic_reg/bif/ |
D | bif_5_1_enum.h | 1055 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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D | bif_5_0_enum.h | 1185 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
D | gmc_8_2_enum.h | 1055 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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D | gmc_8_1_enum.h | 1185 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/smu/ |
D | smu_8_0_enum.h | 1055 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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D | smu_7_1_3_enum.h | 1269 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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D | smu_7_1_2_enum.h | 1233 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
D | uvd_6_0_enum.h | 1068 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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D | uvd_5_0_enum.h | 1198 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_3_0_enum.h | 1484 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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D | oss_3_0_1_enum.h | 1451 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/dce/ |
D | dce_10_0_enum.h | 1760 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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D | dce_11_0_enum.h | 5627 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_8_0_enum.h | 6845 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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D | gfx_8_1_enum.h | 6795 ENABLE_MEM_PWR_CTRL = 0x0, enumerator
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